Datasheet AD8065, AD8066 (Analog Devices) - 7

Data Sheet AD8065/AD8066 SPECIFICATIONS +5 V
@ TA = 25°C, VS = 5 V, RL = 1 kΩ, unless otherwise noted.
Table 3. Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, VO = 0.2 V p-p (AD8065) 125 155 MHz AD8065WARTZ only: TMIN − TMAX 90 MHz G = +1, VO = 0.2 V p-p (AD8066) 110 130 MHz G = +2, VO = 0.2 V p-p 50 MHz G = +2, VO = 2 V p-p 43 MHz Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p 6 MHz Input Overdrive Recovery Time G = +1, −0.5 V to +5.5 V 175 ns Output Recovery Time G = −1, −0.5 V to +5.5 V 170 ns Slew Rate G = +2, VO = 2 V step 105 160 V/µs AD8065WARTZ only: TMIN − TMAX 123 V/µs Settling Time to 0.1% G = +2, VO = 2 V step 60 ns NOISE/HARMONIC PERFORMANCE SFDR fC = 1 MHz, G = +2, VO = 2 V p-p −65 dBc fC = 5 MHz, G = +2, VO = 2 V p-p −50 dBc Third-Order Intercept fC = 10 MHz, RL = 100 Ω 22 dBm Input Voltage Noise f = 10 kHz 7 nV/√Hz Input Current Noise f = 10 kHz 0.6 fA/√Hz Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.13 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.16 Degrees DC PERFORMANCE Input Offset Voltage VCM = 1.0 V, SOIC package 0.4 1.5 mV AD8065WARTZ only: TMIN − TMAX 2.6 mV Input Offset Voltage Drift 1 17 µV/ºC AD8065WARTZ only: TMIN − TMAX 17 µV/ºC Input Bias Current SOIC package 1 5 pA TMIN to TMAX 25 125 pA Input Offset Current 1 5 pA TMIN to TMAX 1 125 pA Open-Loop Gain VO = 1 V to 4 V (AD8065) 100 113 dB AD8065WARTZ only: TMIN − TMAX 100 dB VO = 1 V to 4 V (AD8066) 90 103 dB INPUT CHARACTERISTICS Common-Mode Input Impedance 1000 || 2.1 GΩ || pF Differential Input Impedance 1000 || 4.5 GΩ || pF Input Common-Mode Voltage Range FET Input Range 0 to 1.7 0 to 2.4 V AD8065WARTZ only: TMIN − TMAX 0 to 1.7 V Common-Mode Rejection Ratio VCM = 0.5 V to 1.5 V −74 −100 dB VCM = 1 V to 2 V (SOT-23) −78 −91 dB AD8065WARTZ only: TMIN-TMAX −76 dB OUTPUT CHARACTERISTICS Output Voltage Swing RL = 1 kΩ 0.1 to 4.85 0.03 to 4.95 V AD8065WARTZ only: TMIN − TMAX 0.1 to 4.85 V RL = 150 Ω 0.07 to 4.83 V Output Current VO = 4 V p-p, SFDR ≥ −60 dBc, f = 500 kHz 35 mA Short-Circuit Current 75 mA Capacitive Load Drive 30% overshoot G = +1 5 pF Rev. L | Page 7 of 28 Document Outline Features Applications Connection Diagrams General Description Table of Contents Revision History Specifications ±5 V Specifications ±12 V Specifications +5 V Absolute Maximum Ratings Maximum Power Dissipation Output Short Circuit ESD Caution Typical Performance Characteristics Test Circuits SOIC-8 Pinout Theory of Operation Closed-Loop Frequency Response Noninverting Closed-Loop Frequency Response Inverting Closed-Loop Frequency Response Wideband Operation Input Protection Thermal Considerations Input and Output Overload Behavior Layout, Grounding, and Bypassing Considerations Power Supply Bypassing Grounding Leakage Currents Input Capacitance Output Capacitance Input-to-Output Coupling Wideband Photodiode Preamp High Speed JFET Input Instrumentation Amplifier Video Buffer Outline Dimensions Ordering Guide Automotive Products