Datasheet ADA4857-1, ADA4857-2 (Analog Devices) - 4

ADA4857-1/ADA4857-2 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
OUTPUT CHARACTERISTICS Output Overdrive Recovery Time VIN = ±2.5 V, G = 2 10 ns Output Voltage Swing High RL = 1 kΩ +VS − 1 V RL = 1 kΩ, TMIN to TMAX +VS − 1.3 V RL = 100 Ω +VS – 1.3 V RL = 100 Ω, TMIN to TMAX +VS − 2 V Low RL = 1 kΩ −VS + 1 V RL = 1 kΩ, TMIN to TMAX −VS + 1.3 V RL = 100 Ω −VS + 1.3 V RL = 100 Ω, TMIN to TMAX −VS + 3 V Output Current 50 mA Short-Circuit Current Sinking and sourcing 125 mA Capacitive Load Drive 30% overshoot, G = 2 10 pF POWER SUPPLY Operating Range 4.5 10.5 V Quiescent Current 5 5.5 mA Quiescent Current (Power Down) PD ≥ VCC − 2 V 350 450 μA Positive Power Supply Rejection +VS = 4.5 V to 5.5 V, −VS = −5 V −59 −62 dB Negative Power Supply Rejection +VS = 5 V, −VS = −4.5 V to −5.5 V −65 −68 dB
+5 V SUPPLY
TA = 25°C, G = 2, RF = RG = 499 Ω, RS = 100 Ω for G = 1 (SOIC), RL = 1 kΩ to midsupply, PD = no connect, unless otherwise noted.
Table 2. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE –3 dB Bandwidth (LFCSP/SOIC) G = 1, VOUT = 0.2 V p-p 595 800/750 MHz G = 1, VOUT = 2 V p-p 500/400 MHz G = 2, VOUT = 0.2 V p-p 360/300 MHz Full Power Bandwidth G = 1, VOUT = 2 V p-p, THD < −40 dBc 95 MHz Bandwidth for 0.1 dB Flatness G = 2, VOUT = 2 V p-p, RL = 150 Ω 50/40 MHz (LFCSP/SOIC) Slew Rate (10% to 90%) G = 1, VOUT = 2 V step 1500 V/μs Settling Time to 0.1% G = 2, VOUT = 2 V step 15 ns NOISE/HARMONIC PERFORMANCE Harmonic Distortion f = 1 MHz, G = 1, VOUT = 2 V p-p (HD2) −92 dBc f = 1 MHz, G = 1, VOUT = 2 V p-p (HD3) −90 dBc f = 10 MHz, G = 1, VOUT = 2 V p-p (HD2) −81 dBc f = 10 MHz, G = 1, VOUT = 2 V p-p (HD3) −71 dBc f = 50 MHz, G = 1, VOUT = 2 V p-p (HD2) −69 dBc f = 50 MHz, G = 1, VOUT = 2 V p-p (HD3) −55 dBc Input Voltage Noise f = 100 kHz 4.4 nV/√Hz Input Current Noise f = 100 kHz 1.5 pA/√Hz DC PERFORMANCE Input Offset Voltage ±1 ±4.2 mV TMIN to TMAX ±6.4 mV Input Offset Voltage Drift TMIN to TMAX 4.6 23 μV/°C Input Bias Current −1.7 −3.3 μA TMIN to TMAX −4.1 μA Input Bias Offset Current 50 800 nA Open-Loop Gain VOUT = 1.25 V to 3.75 V 57 dB Rev. D | Page 4 of 21 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ±5 V SUPPLY +5 V SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS APPLICATIONS INFORMATION POWER-DOWN OPERATION CAPACITIVE LOAD CONSIDERATIONS RECOMMENDED VALUES FOR VARIOUS GAINS ACTIVE LOW-PASS FILTER (LPF) NOISE CIRCUIT CONSIDERATIONS PCB LAYOUT POWER SUPPLY BYPASSING GROUNDING OUTLINE DIMENSIONS ORDERING GUIDE