Datasheet AD524 (Analog Devices) - 9

Data Sheet AD524 TYPICAL PERFORMANCE CHARACTERISTICS 20 8 15 6 ) mA) V ( ± ( NT GE 10 4 OLTA CURRE NT T V +25°C U CE P S IN E 5 UI 2 Q
005 008
0
00500-
0
00500-
0 5 10 15 20 0 5 10 15 20 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)
Figure 5. Input Voltage Range vs. Supply Voltage, G = 1 Figure 8. Quiescent Current vs. Supply Voltage
20 16 14 ) V ± 15 A) 12 G ( n ± ( WIN NT 10 S GE 10 8 CURRE OLTA AS 6 T V BI U UT TP 5 4 INP OU 2
006 009
0
00500-
0
00500-
0 5 10 15 20 0 5 10 15 20 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V)
Figure 6. Output Voltage Swing vs. Supply Voltage Figure 9. Input Bias Current vs. Supply Voltage
30 40 30 p) p- V A) 20 n G ( ( 20 NT WIN 10 S GE 0 CURRE AS OLTA BI –10 10 T V UT U TP –20 INP OU –30
007 010
0
00500-
–40
00500-
10 100 1k 10k –75 –25 25 75 125 LOAD RESISTANCE (Ω) TEMPERATURE (°C)
Figure 7. Output Voltage Swing vs. Load Resistance Figure 10. Input Bias Current vs. Temperature Rev. G | Page 9 of 25 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTO-ZERO CIRCUITS ERROR BUDGET ANALYSIS REFERENCES OUTLINE DIMENSIONS ORDERING GUIDE