Datasheet AD624 (Analog Devices) - 7
| Hersteller | Analog Devices |
| Beschreibung | Precision Instrumentation Amplifier |
| Seiten / Seite | 16 / 7 — AD624. 10k. 10T. INPUT. OUT. 100k. 20V p-p. RG1. G = 100. G = 200. G = … |
| Revision | C |
| Dateiformat / Größe | PDF / 397 Kb |
| Dokumentensprache | Englisch |
AD624. 10k. 10T. INPUT. OUT. 100k. 20V p-p. RG1. G = 100. G = 200. G = 500. 500. 200. 0.1%. RG2. –VS. THEORY OF OPERATION. +VS. R52. SENSE. R53. R57. 20k. R56. R54
Modelllinie für dieses Datenblatt
Textversion des Dokuments
AD624 10k
⍀
1k
⍀
10k
⍀
1% 10T 1% +V V INPUT S OUT 100k
⍀
20V p-p 1% RG1 G = 100 G = 200 AD624 G = 500 1k
⍀
500
⍀
200
⍀
0.1% 0.1% 0.1% RG2 –VS
Figure 25. Settling Time Test Circuit
THEORY OF OPERATION
The AD524 should be considered in applications that require The AD624 is a monolithic instrumentation amplifier based on protection from severe input overload. If this is not possible, a modification of the classic three-op-amp instrumentation external protection resistors can be put in series with the inputs amplifier. Monolithic construction and laser-wafer-trimming of the AD624 to augment the internal (50 Ω) protection resis- allow the tight matching and tracking of circuit components and tors. This will most seriously degrade the noise performance. the high level of performance that this circuit architecture is ca- For this reason the value of these resistors should be chosen to pable of. be as low as possible and still provide 10 mA of current limiting A preamp section (Q1–Q4) develops the programmed gain by under maximum continuous overload conditions. In selecting the use of feedback concepts. Feedback from the outputs of A1 the value of these resistors, the internal gain setting resistor and and A2 forces the collector currents of Q1–Q4 to be constant the 1.2 volt drop need to be considered. For example, to pro- thereby impressing the input voltage across R tect the device from a continuous differential overload of 20 V G. at a gain of 100, 1.9 kΩ of resistance is required. The internal The gain is set by choosing the value of RG from the equation, gain resistor is 404 Ω; the internal protect resistor is 100 Ω. 40 k There is a 1.2 V drop across D1 or D2 and the base-emitter Gain = + 1. The value of RG also sets the transconduct- RG junction of either Q1 and Q3 or Q2 and Q4 as shown in Figure ance of the input preamp stage increasing it asymptotically to 27, 1400 Ω of external resistance would be required (700 Ω in the transconductance of the input transistors as RG is reduced series with each input). The RTI noise in this case would be for larger gains. This has three important advantages. First, this approach allows the circuit to achieve a very high open loop gain 4 KTR +(4 nV / Hz)2 = 6.2 nV / Hz ext of 3 × 108 at a programmed gain of 1000 thus reducing gain
+VS
related errors to a negligible 3 ppm. Second, the gain bandwidth product which is determined by C3 or C4 and the input trans-
I1 I2 R52 50
A VB 50
A
conductance, reaches 25 MHz. Third, the input voltage noise
10k
⍀
SENSE
reduces to a value determined by the collector current of the
A1 A2 C3
input transistors for an RTI noise of 4 nV/√Hz at G ≥ 500.
C4 R53 10k
⍀
+VS R57 A3 VO 50
⍀
20k
⍀
R56 R54 Q1, Q3 Q2, +VS 20k –IN RG
⍀
Q4 10k
⍀
100 1 RG2 R55 16.2k
⍀
10k
⍀
200 80.2
⍀
AD624 1
F 13 REF 1/2 50
A 500 I4 500 AD712 124 50
⍀
A 1/2 RG 1
F 2 9.09k
⍀
AD712 4445
⍀
200 50
⍀
+IN 16.2k
⍀
225.3
⍀
G500 G1, 100, 200 1
F 100 –VS 1k
⍀
–VS –V 100
⍀
S 1.62M
⍀
1.82k
⍀ Figure 27. Simplified Circuit of Amplifier; Gain Is Defined as (R56 + R57)/(RG) + 1. For a Gain of 1, RG Is an Open Figure 26. Noise Test Circuit Circuit.
INPUT CONSIDERATIONS INPUT OFFSET AND OUTPUT OFFSET
Under input overload conditions the user will see RG + 100 Ω Voltage offset specifications are often considered a figure of and two diode drops (~1.2 V) between the plus and minus merit for instrumentation amplifiers. While initial offset may inputs, in either direction. If safe overload current under all be adjusted to zero, shifts in offset voltage due to temperature conditions is assumed to be 10 mA, the maximum overload variations will cause errors. Intelligent systems can often correct voltage is ~ ± 2.5 V. While the AD624 can withstand this con- for this factor with an autozero cycle, but there are many small- tinuously, momentary overloads of ± 10 V will not harm the signal high-gain applications that don’t have this capability. device. On the other hand the inputs should never exceed the Voltage offset and offset drift each have two components; input supply voltage. and output. Input offset is that component of offset that is REV. C –7–
⍀
1k
⍀
10k
⍀
1% 10T 1% +V V INPUT S OUT 100k
⍀
20V p-p 1% RG1 G = 100 G = 200 AD624 G = 500 1k
⍀
500
⍀
200
⍀
0.1% 0.1% 0.1% RG2 –VS
Figure 25. Settling Time Test Circuit
THEORY OF OPERATION
The AD524 should be considered in applications that require The AD624 is a monolithic instrumentation amplifier based on protection from severe input overload. If this is not possible, a modification of the classic three-op-amp instrumentation external protection resistors can be put in series with the inputs amplifier. Monolithic construction and laser-wafer-trimming of the AD624 to augment the internal (50 Ω) protection resis- allow the tight matching and tracking of circuit components and tors. This will most seriously degrade the noise performance. the high level of performance that this circuit architecture is ca- For this reason the value of these resistors should be chosen to pable of. be as low as possible and still provide 10 mA of current limiting A preamp section (Q1–Q4) develops the programmed gain by under maximum continuous overload conditions. In selecting the use of feedback concepts. Feedback from the outputs of A1 the value of these resistors, the internal gain setting resistor and and A2 forces the collector currents of Q1–Q4 to be constant the 1.2 volt drop need to be considered. For example, to pro- thereby impressing the input voltage across R tect the device from a continuous differential overload of 20 V G. at a gain of 100, 1.9 kΩ of resistance is required. The internal The gain is set by choosing the value of RG from the equation, gain resistor is 404 Ω; the internal protect resistor is 100 Ω. 40 k There is a 1.2 V drop across D1 or D2 and the base-emitter Gain = + 1. The value of RG also sets the transconduct- RG junction of either Q1 and Q3 or Q2 and Q4 as shown in Figure ance of the input preamp stage increasing it asymptotically to 27, 1400 Ω of external resistance would be required (700 Ω in the transconductance of the input transistors as RG is reduced series with each input). The RTI noise in this case would be for larger gains. This has three important advantages. First, this approach allows the circuit to achieve a very high open loop gain 4 KTR +(4 nV / Hz)2 = 6.2 nV / Hz ext of 3 × 108 at a programmed gain of 1000 thus reducing gain
+VS
related errors to a negligible 3 ppm. Second, the gain bandwidth product which is determined by C3 or C4 and the input trans-
I1 I2 R52 50
A VB 50
A
conductance, reaches 25 MHz. Third, the input voltage noise
10k
⍀
SENSE
reduces to a value determined by the collector current of the
A1 A2 C3
input transistors for an RTI noise of 4 nV/√Hz at G ≥ 500.
C4 R53 10k
⍀
+VS R57 A3 VO 50
⍀
20k
⍀
R56 R54 Q1, Q3 Q2, +VS 20k –IN RG
⍀
Q4 10k
⍀
100 1 RG2 R55 16.2k
⍀
10k
⍀
200 80.2
⍀
AD624 1
F 13 REF 1/2 50
A 500 I4 500 AD712 124 50
⍀
A 1/2 RG 1
F 2 9.09k
⍀
AD712 4445
⍀
200 50
⍀
+IN 16.2k
⍀
225.3
⍀
G500 G1, 100, 200 1
F 100 –VS 1k
⍀
–VS –V 100
⍀
S 1.62M
⍀
1.82k
⍀ Figure 27. Simplified Circuit of Amplifier; Gain Is Defined as (R56 + R57)/(RG) + 1. For a Gain of 1, RG Is an Open Figure 26. Noise Test Circuit Circuit.
INPUT CONSIDERATIONS INPUT OFFSET AND OUTPUT OFFSET
Under input overload conditions the user will see RG + 100 Ω Voltage offset specifications are often considered a figure of and two diode drops (~1.2 V) between the plus and minus merit for instrumentation amplifiers. While initial offset may inputs, in either direction. If safe overload current under all be adjusted to zero, shifts in offset voltage due to temperature conditions is assumed to be 10 mA, the maximum overload variations will cause errors. Intelligent systems can often correct voltage is ~ ± 2.5 V. While the AD624 can withstand this con- for this factor with an autozero cycle, but there are many small- tinuously, momentary overloads of ± 10 V will not harm the signal high-gain applications that don’t have this capability. device. On the other hand the inputs should never exceed the Voltage offset and offset drift each have two components; input supply voltage. and output. Input offset is that component of offset that is REV. C –7–