Datasheet AD622 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungLow Cost Instrumentation Amplifier
Seiten / Seite16 / 9 — Data Sheet. AD622. THEORY OF OPERATION. MAKE vs. BUY: A TYPICAL …
RevisionE
Dateiformat / GrößePDF / 282 Kb
DokumentenspracheEnglisch

Data Sheet. AD622. THEORY OF OPERATION. MAKE vs. BUY: A TYPICAL APPLICATION ERROR. +VS. BUDGET. 20µA. 10kΩ. OUTPUT. REF. +IN. – IN. 400Ω. GAIN

Data Sheet AD622 THEORY OF OPERATION MAKE vs BUY: A TYPICAL APPLICATION ERROR +VS BUDGET 20µA 10kΩ OUTPUT REF +IN – IN 400Ω GAIN

Modelllinie für dieses Datenblatt

Textversion des Dokuments

link to page 9 link to page 9 link to page 10
Data Sheet AD622 THEORY OF OPERATION
The AD622 is a monolithic instrumentation amplifier based on The value of RG also determines the transconductance of the a modification of the classic three op amp approach. Absolute preamp stage. As RG is reduced for larger gains, the trans- value trimming allows the user to program gain accurately (to conductance increases asymptotically to that of the input 0.5% at G = 1000) with only one resistor. Monolithic construction transistors. This has the following three important advantages: and laser wafer trimming allow the tight matching and tracking • Open-loop gain is boosted for increasing programmed of circuit components, thus insuring AD622 performance. gain, thus reducing gain-related errors. Input Transistor Q1 and Input Transistor Q2 provide a single • The gain-bandwidth product (determined by C1, C2, and differential-pair bipolar input for high precision (see Figure 16). the preamp transconductance) increases with programmed Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop gain, thus optimizing frequency response. maintains constant collector current of the Q1 and Q2 input • The input voltage noise is reduced to a value of 12 nV/√Hz, devices, thereby impressing the input voltage across External determined mainly by the collector current and base Gain-Setting Resistor RG. This creates a differential gain from the resistance of the input devices. inputs to the A1 and A2 outputs given by G = (R1 + R2)/RG + 1. The internal gain resistors, R1 and R2, are trimmed to an Unity-Gain Subtractor A3 removes any common-mode signal, absolute value of 25.25 kΩ, allowing the gain to be programmed yielding a single-ended output referred to the REF pin potential. accurately with a single external resistor.
MAKE vs. BUY: A TYPICAL APPLICATION ERROR +VS BUDGET
The AD622 offers cost and performance advantages over
I1 20µA VB 20µA I2
discrete two op amp instrumentation amplifier designs along with smaller size and fewer components. In a typical application
A1 A2 10kΩ
shown in Figure 17, a gain of 10 is required to receive and
C1 C2
amplify a 0 to 20 mA signal from the AD694 current transmitter.
10kΩ OUTPUT
The current is converted to a voltage in a 50 Ω shunt. In
A3
applications where transmission is over long distances, line
10kΩ 10kΩ
impedance can be significant so that differential voltage
REF +VS +VS
measurement is essential. Where there is no connection
R1 R2 Q1
between the ground returns of transmitter and receiver, there
Q2 +IN – IN R3 R4
must be a dc path from each input to ground, implemented in
400Ω RG 400Ω
this case using two 1 kΩ resistors. The error budget detailed in
GAIN GAIN SENSE SENSE
Table 5 shows how to calculate the effect of various error sources on circuit accuracy. 022
–VS
00777- Figure 16. Simplified Schematic of the AD622
+ RL2 1kΩ 10Ω VIN 1/2 LT1013 1/2 AD694 0 TO 20mA 50Ω LT1013 0 TO 20mA 1kΩ RG AD622 TRANSMITTER 5.62kΩ 1kΩ RL2 10Ω 1kΩ REF 9kΩ* 1kΩ* 1kΩ* 9kΩ* *0.1% RESISTOR MATCH, 50ppm/°C TRACKING 0 TO 20mA CURRENT LOOP AD622 MONOLITHIC INSTRUMENTATION HOMEBREW IN-AMP, G = 10
016
WITH 50Ω SHUNT IMPEDANCE AMPLIFIER, G = 9.986
00777- Figure 17. Make vs. Buy Rev. E | Page 9 of 16 Document Outline Features Applications Pin Configuration General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Typical Performance Characteristics Theory of Operation Make vs. Buy: A Typical Application Error Budget Gain Selection Input and Output Offset Voltage Reference Terminal Input Protection RF Interference Ground Returns for Input Bias Currents Outline Dimensions Ordering Guide