Datasheet AD8220 (Analog Devices) - 4

HerstellerAnalog Devices
BeschreibungJFET Input Instrumentation Amplifier with Rail-to-Rail Output in MSOP Package
Seiten / Seite28 / 4 — AD8220. Data Sheet. A Grade. B Grade. W Grade. Parameter. Test …
RevisionC
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AD8220. Data Sheet. A Grade. B Grade. W Grade. Parameter. Test Conditions. Min. Typ. Max. Unit

AD8220 Data Sheet A Grade B Grade W Grade Parameter Test Conditions Min Typ Max Unit

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AD8220 Data Sheet A Grade B Grade W Grade Parameter Test Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Settling Time 0.01% 10 V step, TA G = 1 5 5 5 µs G = 10 4.3 4.3 4.3 µs G = 100 8.1 8.1 8.1 µs G = 1000 58 58 58 µs Settling Time 0.001% 10 V step, TA G = 1 6 6 6 µs G = 10 4.6 4.6 4.6 µs G = 100 9.6 9.6 9.6 µs G = 1000 74 74 74 µs Slew Rate G = 1 to 100 TA 2 2 2 V/µs GAIN G = 1 + (49.4 kΩ/RG), TA for A, B grades, TOPR for W grade Gain Range 1 1000 1 1000 1 1000 V/V Gain Error VOUT = ±10 V G = 1 −0.06 +0.06 −0.04 +0.04 −0.1 +0.1 % G = 10 −0.3 +0.3 −0.2 +0.2 −0.8 +0.8 % G = 100 −0.3 +0.3 −0.2 +0.2 −0.8 +0.8 % G = 1000 −0.3 +0.3 −0.2 +0.2 −0.8 +0.8 % Gain Nonlinearity VOUT = −10 V to +10 V, TA G = 1 RL = 10 kΩ 10 15 10 15 10 15 ppm G = 10 RL = 10 kΩ 5 10 5 10 5 10 ppm G = 100 RL = 10 kΩ 30 60 30 60 30 60 ppm G = 1000 RL = 10 kΩ 400 500 400 500 400 500 ppm G = 1 RL = 2 kΩ 10 15 10 15 10 15 ppm G = 10 RL = 2 kΩ 10 15 10 15 10 15 ppm G = 100 RL = 2 kΩ 50 75 50 75 50 75 ppm Gain vs. Temperature G = 1 3 10 2 5 3 10 ppm/°C G > 10 −50 −50 −50 ppm/°C INPUT Impedance (Pin to TA 104||5 104||5 104||5 GΩ||pF Ground)2 Input Operating Voltage VS = ±2.25 V to ±18 V −VS − +VS − −VS − +VS − −VS − +VS − 2 V Range3 for dual supplies 0.1 2 0.1 2 0.1 Over Temperature TOPR −VS − +VS − −VS − +VS − −VS − +VS − V 0.1 2.1 0.1 2.1 0.1 2.2 OUTPUT Output Swing RL = 10 kΩ, TA −14.7 +14.7 −14.7 +14.7 −14.7 +14.7 V Over Temperature TOPR −14.6 +14.6 −14.6 +14.6 −14.3 +14.3 V Short-Circuit Current TA 15 15 15 mA REFERENCE INPUT TA kΩ RIN 40 40 40 µA IIN VIN+, VIN− = 0 V 70 70 70 V Voltage Range −VS +VS −VS +VS +VS V/V Gain to Output TA 1 ± 1 ± 1 ± V/V 0.0001 0.0001 0.0001 Rev. C | Page 4 of 28 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION LAYOUT Common-Mode Rejection Ratio (CMRR) Grounding REFERENCE TERMINAL POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RF INTERFERENCE COMMON-MODE INPUT VOLTAGE RANGE DRIVING AN ADC APPLICATIONS INFORMATION AC-COUPLED INSTRUMENTATION AMPLIFIER DIFFERENTIAL OUTPUT ELECTROCARDIOGRAM SIGNAL CONDITIONING OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS