Datasheet AD8251 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | 10 MHz, G = 1, 2, 4, 8 iCMOS Programmable Gain Instrumentation Amplifier |
| Seiten / Seite | 24 / 9 — AD8251. 150. 130. G = 4. 110. G = 2. G = 1. RR S. G = 8. 1.25µV/DIV. … |
| Revision | B |
| Dateiformat / Größe | PDF / 646 Kb |
| Dokumentensprache | Englisch |
AD8251. 150. 130. G = 4. 110. G = 2. G = 1. RR S. G = 8. 1.25µV/DIV. 1s/DIV. 100. 10k. 100k. FREQUENCY (Hz). √Hz. ( E. ) V µ. I ( T , R. E G A T. L O V. T E FS
Modelllinie für dieses Datenblatt
Textversion des Dokuments
AD8251 150 130 G = 4 110 G = 2 B) 90 d G = 1 ( RR S 70 P G = 8 50 30
16 2 0
1.25µV/DIV 1s/DIV
7- -01 628 87
10
0 62 0
10 100 1k 10k 100k 1M FREQUENCY (Hz)
Figure 12. 0.1 Hz to 10 Hz RTI Voltage Noise, G = 8 Figure 15. Positive PSRR vs. Frequency, RTI
18 150 16 130 14 110 ) 12 G = 4 √Hz G = 8 B) 90 A/ 10 d p ( ( E RR 8 IS S 70 G = 1 P NO 6 50 4 G = 2 30
13
2
17 0 0 7- 7- 28 628 06
0 10
0
1 10 100 1k 10k 100k 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz)
Figure 13. Current Noise Spectral Density vs. Frequency Figure 16. Negative PSRR vs. Frequency, RTI
10 9 ) V µ 8 I ( T , R 7 E G A T 6 L O V 5 T E FS 4 OF 3 IN E G 2 N A H 1
4
140pA/DIV 1s/DIV C
-01 87
0
7 1 62 1 0
0.01 0.1 1 10
7-
WARM-UP TIME (minutes)
28 06 Figure 14. 0.1 Hz to 10 Hz Current Noise Figure 17. Change in Offset Voltage, RTI vs. Warmup Time Rev. B | Page 9 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ADC APPLICATIONS DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE
16 2 0
1.25µV/DIV 1s/DIV
7- -01 628 87
10
0 62 0
10 100 1k 10k 100k 1M FREQUENCY (Hz)
Figure 12. 0.1 Hz to 10 Hz RTI Voltage Noise, G = 8 Figure 15. Positive PSRR vs. Frequency, RTI
18 150 16 130 14 110 ) 12 G = 4 √Hz G = 8 B) 90 A/ 10 d p ( ( E RR 8 IS S 70 G = 1 P NO 6 50 4 G = 2 30
13
2
17 0 0 7- 7- 28 628 06
0 10
0
1 10 100 1k 10k 100k 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz)
Figure 13. Current Noise Spectral Density vs. Frequency Figure 16. Negative PSRR vs. Frequency, RTI
10 9 ) V µ 8 I ( T , R 7 E G A T 6 L O V 5 T E FS 4 OF 3 IN E G 2 N A H 1
4
140pA/DIV 1s/DIV C
-01 87
0
7 1 62 1 0
0.01 0.1 1 10
7-
WARM-UP TIME (minutes)
28 06 Figure 14. 0.1 Hz to 10 Hz Current Noise Figure 17. Change in Offset Voltage, RTI vs. Warmup Time Rev. B | Page 9 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN SELECTION Transparent Gain Mode Latched Gain Mode Timing for Latched Gain Mode POWER SUPPLY REGULATION AND BYPASSING INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION REFERENCE TERMINAL COMMON-MODE INPUT VOLTAGE RANGE LAYOUT Grounding Coupling Noise Common-Mode Rejection RF INTERFERENCE DRIVING AN ADC APPLICATIONS DIFFERENTIAL OUTPUT SETTING GAINS WITH A MICROCONTROLLER DATA ACQUISITION OUTLINE DIMENSIONS ORDERING GUIDE