AD82285MEAN: –0.097 SD: 0.074)VS = ±5V80(V E3G A T2L601SE VOTD OHI0-M40NVOS = ±2.5V–1M M O –2C20T –3PU IN –40 –0.6–0.4–0.200.20.40.6 50 –5 0 35 5- –5–4–3–2–1012345 0 I 03 5- OS @ 15V (nA) 07 OUTPUT VOLTAGE (V) 03 07 Figure 9. Typical Distribution of Input Offset Current Figure 12. Input Common-Mode Voltage vs. Output Voltage, VS = ±2.5 V, ±5 V; G = 100 5154)V(VS = ±5V10(V)E3EVGGS = ±15VAAT2TLL51E VOE VODDO0O0-M-MNVNO –1S = ±2.5VOMMMM –5O –2OCCTT–3PUPU –10ININ–4–5–15 6 –5–4–3–2–1012345 330 –15–10–5051015 03 5- 5- OUTPUT VOLTAGE (V) 03 OUTPUT VOLTAGE (V) 03 07 07 Figure 10. Input Common-Mode Voltage vs. Output Voltage, Figure 13. Input Common-Mode Voltage vs. Output Voltage, VS = ±2.5 V, ±5 V; G =10 VS = ±15 V, G = 100 150.600.5510(V)+IN IBIAS, ±15V SUPPLIESE GVS = ±15VAA) 0.50T L5(n–IN IBIAS, ±15V SUPPLIESNT 0.45E VO D O00.40-MCURRE+IN INSBIAS, ±5V SUPPLIESOIAMB 0.35M –5OUT–IN IBIAS, ±5V SUPPLIESC T0.30INPPU –10IN0.25–15 4 0.20 51 –15–10–5051015 03 –15–10–5051015 0 5- 5- OUTPUT VOLTAGE (V) 03 COMMON-MODE VOLTAGE (V) 03 07 07 Figure 11. Input Common-Mode Voltage vs. Output Voltage, Figure 14. Input Bias Current vs. Common-Mode Voltage VS = ±15 V, G = 10 Rev. 0 | Page 10 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION CONNECTION DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GAIN = 10 GAIN = 100 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE SETTING THE GAIN COMMON-MODE INPUT VOLTAGE RANGE REFERENCE TERMINAL LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies References Input Bias Current Return Path INPUT PROTECTION Input Voltages Beyond the Rails Large Differential Voltages When G = 100 RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION DIFFERENTIAL DRIVE PRECISION STRAIN GAGE DRIVING A DIFFERENTIAL ADC OUTLINE DIMENSIONS ORDERING GUIDE