Datasheet AD8227 (Analog Devices) - 6

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AD8227 Test Conditions/ A Grade B Grade Parameter Comments Min Typ Max Min Typ Max Unit
DYNAMIC RESPONSE Small Signal −3 dB Bandwidth G = 5 250 250 kHz G = 10 200 200 kHz G = 100 50 50 kHz G = 1000 5 5 kHz Settling Time 0.01% 2 V step G = 5 6 6 μs G = 10 6 6 μs G = 100 30 30 μs G = 1000 275 275 μs Slew Rate2 G = 5 to 10 0.6 0.6 V/μs GAIN3 G = 5 + (80 kΩ/RG) Gain Range 5 1000 5 1000 V/V Gain Error G = 5 VOUT = 0.8 V to 1.8 V 0.04 0.04 % G = 10 to 1000 VOUT = 0.2 V to 2.5 V 0.3 0.3 % Gain vs. Temperature TA = −40°C to +125°C G = 5 5 5 ppm/°C G > 5 −100 −100 ppm/°C INPUT −VS = 0 V; +VS = 2.7 V to 36 V Impedance Differential 0.8||2 0.8||2 GΩ||pF Common Mode 0.4||2 0.4||2 GΩ||pF Operating Voltage Range4 TA = +25°C −0.1 +VS − 0.7 −0.1 +VS − 0.7 V TA = −40°C −0.15 +VS − 0.9 −0.15 +VS − 0.9 V TA = +125°C −0.05 +VS − 0.6 −0.05 +VS − 0.6 V Overvoltage Range TA = −40°C to +125°C +VS − 40 −VS + 40 +VS − 40 −VS + 40 V OUTPUT Output Swing TA = −40°C to +125°C RL = 2 kΩ to 1.35 V 0.2 +VS − 0.2 0.2 +VS − 0.2 V RL = 10 kΩ to 1.35 V 0.1 +VS − 0.1 0.1 +VS − 0.1 V Short-Circuit Current 13 13 mA POWER SUPPLY Operating Range Single-supply operation 2.2 36 2.2 36 V Quiescent Current +VS = 2.7 V TA = +25°C 325 400 325 400 μA TA = −40°C 250 325 250 325 μA TA = +85°C 425 500 425 500 μA TA = +125°C 475 550 475 550 μA TEMPERATURE RANGE −40 +125 −40 +125 °C 1 Input stage uses pnp transistors, so input bias current always flows into the part. 2 At high gains, the part is bandwidth limited rather than slew rate limited. 3 For G > 5, gain error specifications do not include the effects of External Resistor RG. 4 Input voltage range of the AD8227 input stage. The input range depends on the common-mode voltage, differential voltage, gain, and reference voltage. See the Input Volt sectio age Range n for more information. Rev. 0 | Page 6 of 24 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION DIFFERENTIAL DRIVE Tips for Best Differential Output Performance PRECISION STRAIN GAGE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE