Datasheet AD8426 (Analog Devices) - 10

AD8426 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S T1 T2 S +V OU OU –V 16 15 14 13 AD8426 –IN1 1 12 –IN2 RG1 2 11 RG2 RG1 3 10 RG2 +IN1 4 9 +IN2 5 6 7 8
02
S 1 2 S
-0
F F +V –V
490
RE RE
09 Figure 2. Pin Configuration
Table 10. Pin Function Descriptions Pin No. Mnemonic Description
1 −IN1 Negative Input, In-Amp 1 2 RG1 Gain-Setting Resistor Terminal, In-Amp 1 3 RG1 Gain-Setting Resistor Terminal, In-Amp 1 4 +IN1 Positive Input, In-Amp 1 5 +VS Positive Supply 6 REF1 Reference Adjust, In-Amp 1 7 REF2 Reference Adjust, In-Amp 2 8 −VS Negative Supply 9 +IN2 Positive Input, In-Amp 2 10 RG2 Gain-Setting Resistor Terminal, In-Amp 2 11 RG2 Gain-Setting Resistor Terminal, In-Amp 2 12 −IN2 Negative Input, In-Amp 2 13 −VS Negative Supply 14 OUT2 Output, In-Amp 2 15 OUT1 Output, In-Amp 1 16 +VS Positive Supply Rev. 0 | Page 10 of 28 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY OPERATION Dynamic Performance Specifications SINGLE-SUPPLY OPERATION Dynamic Performance Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Package Considerations Hidden Paddle Package Common-Mode Rejection Ratio over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION PRECISION STRAIN GAGE DIFFERENTIAL DRIVE Differential Output Using Both AD8426 Amplifiers 2-Channel Differential Output Using a Dual Op Amp Tips for Best Differential Output Performance DRIVING A CABLE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE