Datasheet ADP1720-EP (Analog Devices) - 4

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ADP1720-EP Data Sheet Parameter Symbol Conditions Min Typ Max Unit
POWER SUPPLY REJECTION RATIO PSRR f = 120 Hz, V = 8 V, V = 1.6 V –90 dB IN OUT f = 1 kHz, V = 8 V, V = 1.6 V –80 dB IN OUT f = 10 kHz, V = 8 V, V = 1.6 V –60 dB IN OUT f = 120 Hz, V = 8 V, V = 5 V –83 dB IN OUT f = 1 kHz, V = 8 V, V = 5 V –70 dB IN OUT f = 10 kHz, V = 8 V, V = 5 V –50 dB IN OUT 1 Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 Based on an end-point calculation using 1 mA and 50 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA. 3 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output voltages above 4 V. 4 Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value. 5 Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V. Rev. A | Page 4 of 12 Document Outline Features Enhanced Product Features Applications Typical Application Circuits General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Thermal Considerations Outline Dimensions Ordering Guide