Datasheet ADP1740, ADP1741 (Analog Devices) - 4

HerstellerAnalog Devices
Beschreibung2 A, Low VIN, Dropout, CMOS Linear Regulator
Seiten / Seite20 / 4 — ADP1740/ADP1741. Data Sheet. Parameter. Symbol. Test Conditions/Comments. …
RevisionH
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DokumentenspracheEnglisch

ADP1740/ADP1741. Data Sheet. Parameter. Symbol. Test Conditions/Comments. Min. Typ. Max. Unit

ADP1740/ADP1741 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit

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ADP1740/ADP1741 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit
SENSE INPUT BIAS CURRENT SNSI-BIAS 1.6 V ≤ VIN ≤ 3.6 V 10 µA (ADP1740) OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VOUT = 0.75 V 23 µV rms 10 Hz to 100 kHz, VOUT = 2.5 V 65 µV rms POWER SUPPLY REJECTION RATIO PSRR VIN = VOUT + 1 V, IOUT = 10 mA 1 kHz, VOUT = 0.75 V 65 dB 1 kHz, VOUT = 2.5 V 56 dB 10 kHz, VOUT = 0.75 V 65 dB 10 kHz, VOUT = 2.5 V 56 dB 100 kHz, VOUT = 0.75 V 54 dB 100 kHz, VOUT = 2.5 V 51 dB 1 Minimum output load current is 500 μA. 2 Accuracy when VOUT is connected directly to ADJ. When VOUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of the resistors used. 3 Based on an endpoint calculation using 10 mA and 2 A loads. See Figure 6 for typical load regulation performance. 4 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only to output voltages above 1.6 V. 5 Start-up time is defined as the time between the rising edge of EN to VOUT being at 95% of its nominal value. 6 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
MINIMUM INPUT AND OUTPUT CAPACITANCE1 CMIN TA = –40°C to +125°C 3.3 µF CAPACITOR ESR RESR TA = –40°C to +125°C 0.001 0.1 Ω 1 The minimum input and output capacitance should be greater than 3.3 µF over the full range of operating conditions. The ful range of operating conditions in the application must be considered during capacitor selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with this LDO. Rev. H | Page 4 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START FUNCTION ADJUSTABLE OUTPUT VOLTAGE (ADP1741) ENABLE FEATURE POWER-GOOD FEATURE REVERSE CURRENT PROTECTION FEATURE APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE