Datasheet HMC976LP3E (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | 400 mA Low Noise, High PSRR Linear Voltage Regulator |
| Seiten / Seite | 12 / 8 — HMC976LP3E. 400mA LOW NOISE, HIGH PSRR. LINEAR VOLTAGE REGULATOR. Figure … |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
HMC976LP3E. 400mA LOW NOISE, HIGH PSRR. LINEAR VOLTAGE REGULATOR. Figure 13. Evaluation PCB Schematic. Operational Features
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HMC976LP3E
v02.1112
400mA LOW NOISE, HIGH PSRR LINEAR VOLTAGE REGULATOR Figure 13. Evaluation PCB Schematic
T M G - S
Operational Features
IN N The recommended configuration is “HMC976LP3E 4.8V User Application Schematic”. This is for the default output voltage of 4.8V nominal. The values shown are those recommended for optimum Noise Spectral density. For users IO requiring extremely low noise in the 1 MHz to 10 MHz range the largest output capacitor should be used: a 68uF takes IT the noise between 100 kHz and 1 MHz to below 2.5nV/√Hz. D N
Load Capacitor Characteristics
O The HMC976LP3E was designed to work with a low ESR ceramic load capacitor on the VRX pin (C21 in the R C schematic above). Low ESR ceramic capacitors are very small and best for eliminating high frequency noise. Ceramic E capacitors can vary as much as 50% versus temperature and 60% versus voltage, dependant on the ceramic type e.g. Z5U, Y5V, X7R or X5R. There are no restrictions on ceramic type or minimum ESR, only that the user must W guarantee that the minimum output capacitance over operating conditions is 4.7μF, smal er values can result in noise O peaking or lower stability. P InfoFro ma r p tion rfiucre nis, d he e d lbiv y e An raly a og n Ded t viceo p s is la be clie o eved rtd o e b re sa: H ccur iattti e te M and re ilicarbloew . a Ho ve C wever, onro For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other poration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 978-250-3343 tel • 978-250-3373 fax • O rights of third parties that may result from its use. Specifications subject to change without notice. No rd P e h r O one n : 7-lin 81- e a 329-t w 47 w 0 w.h 0 • O it rd teite r o .nc li o n m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. e at www.analog.com 8 Application S Trademarks and registered trademarks are the property of their respective owners. upport: apps@ A h p i p tliti c te ati .ocom n Support: Phone: 1-800-ANALOG-D
v02.1112
400mA LOW NOISE, HIGH PSRR LINEAR VOLTAGE REGULATOR Figure 13. Evaluation PCB Schematic
T M G - S
Operational Features
IN N The recommended configuration is “HMC976LP3E 4.8V User Application Schematic”. This is for the default output voltage of 4.8V nominal. The values shown are those recommended for optimum Noise Spectral density. For users IO requiring extremely low noise in the 1 MHz to 10 MHz range the largest output capacitor should be used: a 68uF takes IT the noise between 100 kHz and 1 MHz to below 2.5nV/√Hz. D N
Load Capacitor Characteristics
O The HMC976LP3E was designed to work with a low ESR ceramic load capacitor on the VRX pin (C21 in the R C schematic above). Low ESR ceramic capacitors are very small and best for eliminating high frequency noise. Ceramic E capacitors can vary as much as 50% versus temperature and 60% versus voltage, dependant on the ceramic type e.g. Z5U, Y5V, X7R or X5R. There are no restrictions on ceramic type or minimum ESR, only that the user must W guarantee that the minimum output capacitance over operating conditions is 4.7μF, smal er values can result in noise O peaking or lower stability. P InfoFro ma r p tion rfiucre nis, d he e d lbiv y e An raly a og n Ded t viceo p s is la be clie o eved rtd o e b re sa: H ccur iattti e te M and re ilicarbloew . a Ho ve C wever, onro For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other poration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 978-250-3343 tel • 978-250-3373 fax • O rights of third parties that may result from its use. Specifications subject to change without notice. No rd P e h r O one n : 7-lin 81- e a 329-t w 47 w 0 w.h 0 • O it rd teite r o .nc li o n m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. e at www.analog.com 8 Application S Trademarks and registered trademarks are the property of their respective owners. upport: apps@ A h p i p tliti c te ati .ocom n Support: Phone: 1-800-ANALOG-D