Data SheetADP222/ADP223/ADP224/ADP225ABSOLUTE MAXIMUM RATINGS Junction-to-ambient thermal resistance (θJA) of the package is Table 3. based on modeling and calculation using a 4-layer board. θJA ParameterRating is highly dependent on the application and board layout. In VIN to GND −0.3 V to +6 V applications where high maximum power dissipation exists, ADJ1, ADJ2, VOUT1, VOUT2 to GND −0.3 V to VIN close attention to thermal board design is required. The value EN1, EN2 to GND −0.3 V to +6 V of θJA may vary, depending on PCB material, layout, and Storage Temperature Range −65°C to +150°C environmental conditions. The specified value of θJA is based Operating Junction Temperature Range −40°C to +125°C on a 4-layer, 4 in × 3 in, 2½ oz copper board, as per JEDEC Soldering Conditions JEDEC J-STD-020 standards. For more information, see the AN-772 Application Stresses above those listed under Absolute Maximum Ratings Note, A Design and Manufacturing Guide for the Lead Frame may cause permanent damage to the device. This is a stress Chip Scale Package (LFCSP). rating only; functional operation of the device at these or any ΨJB is the junction-to-board thermal characterization parameter other conditions above those indicated in the operational with units of °C/W. ΨJB of the package is based on modeling and section of this specification is not implied. Exposure to absolute calculation using a 4-layer board. The JESD51-12, Guidelines for maximum rating conditions for extended periods may affect Reporting and Using Package Thermal Information, states that device reliability. thermal characterization parameters are not the same as thermal THERMAL DATA resistances. ΨJB measures the component power flowing through multiple thermal paths rather than a single path as in Absolute maximum ratings apply individually only, not in thermal resistance, θ combination. JB. Therefore, ΨJB thermal paths include convection from the top of the package as wel as radiation from The ADP222/ADP223/ADP224/ADP225 can be damaged when the package, factors that make ΨJB more useful in real-world the junction temperature limits are exceeded. Monitoring applications. Maximum junction temperature (TJ) is calculated ambient temperature does not guarantee that TJ is within the from the board temperature (TB) and power dissipation (PD) specified temperature limits. In applications with high power using the formula dissipation and poor thermal resistance, the maximum ambient T temperature may have to be derated. In applications with J = TB + (PD × ΨJB) moderate power dissipation and low PCB thermal resistance, the Refer to JESD51-8 and JESD51-12 for more detailed maximum ambient temperature can exceed the maximum limit as information about ΨJB. long as the junction temperature is within specification limits. THERMAL RESISTANCE The junction temperature (TJ) of the device is dependent on the ambient temperature (T θJA and ΨJB are specified for the worst-case conditions, that is, a A), the power dissipation of the device (P device soldered in a circuit board for surface-mount packages. D), and the junction-to-ambient thermal resistance of the package (θJA). Maximum junction temperature (TJ) is calculated Table 4. Thermal Resistance from the ambient temperature (TA) and power dissipation (PD) Package TypeθJAθJCΨJBUnit using the formula 8-Lead 2 mm × 2 mm LFCSP 50.2 31.7 18.2 °C/W TJ = TA + (PD × θJA) ESD CAUTION Rev. E | Page 5 of 24 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Enable Feature Quick Output Discharge (QOD) Function Current Limit and Thermal Overload Protection Thermal Considerations Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide