Datasheet ADP7102 (Analog Devices)

20 V, 300 mA, Low Noise, CMOS LDO Data Sheet ADP7102 FEATURES TYPICAL APPLICATION CIRCUITS Input voltage range: 3.3 V to 20 V VIN = 8V VIN VOUT VOUT = 5V Maximum output current: 300 mA CIN + + COUT 1µF 1µF Low noise: 15 μV rms for fixed output versions SENSE PSRR performance of 60 dB at 10 kHz, VOUT = 3.3 V RPG R1 ON 100kΩ 100kΩ Reverse current protection OFF EN/ UVLO R2 Low dropout voltage: 200 mV at 300 mA load PG PG 100kΩ Initial accuracy: ±0.8% GND
1 00
Accuracy over line, load, and temperature: −2%, +1%
6- 950 0
Low quiescent current (VIN = 5 V), IGND = 750 μA with 300 mA load
Figure 1. ADP7102 with Fixed Output Voltage, 5 V
Low shutdown current: 40 μA at VIN = 12 V Stable with small 1 μF ceramic output capacitor VIN = 8V VIN VOUT VOUT = 5V + + 7 fixed output voltage options: 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V, CIN R1 COUT 1µF 40.2kΩ 1µF 5 V, and 9 V ADJ R2 R3 Adjustable output from 1.22 V to V 13kΩ IN − VDO ON 100kΩ OFF EN/ RPG Foldback current limit and thermal overload protection UVLO 100kΩ R4 PG PG User programmable precision UVLO/enable 100kΩ GND Power-good indicator
02 0
8-lead LFCSP and 8-lead SOIC packages
09506-
APPLICATIONS
Figure 2. ADP7102 with Adjustable Output Voltage, 5 V
Regulation to noise sensitive applications: ADC, DAC circuits, precision amplifiers, high frequency oscillators, clocks, and phase-locked loops Communications and infrastructure Medical and healthcare Industrial and instrumentation GENERAL DESCRIPTION
The ADP7102 is a CMOS, low dropout linear regulator that The ADP7102 output noise voltage is 15 μV rms and is operates from 3.3 V to 20 V and provides up to 300 mA of output independent of the output voltage. A digital power-good output current. This high input voltage LDO is ideal for regulation of high allows power system monitors to check the health of the output performance analog and mixed signal circuits operating from voltage. A user programmable precision undervoltage lockout 19 V to 1.22 V rails. Using an advanced proprietary architecture, it function facilitates sequencing of multiple power supplies. provides high power supply rejection, low noise, and achieves The ADP7102 is available in 8-lead, 3 mm × 3 mm LFCSP and excellent line and load transient response with just a small 1 μF 8-lead SOIC packages. The LFCSP offers a very compact solution ceramic output capacitor. and also provides excellent thermal performance for applications The ADP7102 is available in seven fixed output voltage options requiring up to 300 mA of output current in a small, low profile and an adjustable version, which allows output voltages that footprint. range from 1.22 V to VIN − VDO via an external feedback divider.
Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2011–2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA Thermal Resistance ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties PROGRAMABLE UNDERVOLTAGE LOCKOUT (UVLO) POWER-GOOD FEATURE NOISE REDUCTION OF THE ADJUSTABLE ADP7102 CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE