Datasheet ADM7150 (Analog Devices) - 6

ADM7150 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS VREG 1 8 VIN VREG 1 8 VIN ADM7150 VOUT 2 7 EN VOUT 2 7 EN ADM7150 TOP VIEW BYP 6 REF BYP 3 3 TOP VIEW 6 REF (Not to Scale) (Not to Scale) GND 4 5 REF_SENSE GND 4 5 REF_SENSE NOTES NOTES 1. EXPOSED PAD ON THE BOTTOM OF THE PACKAGE. 1. EXPOSED PAD ON THE BOTTOM OF THE PACKAGE. EXPOSED PAD ENHANCES THERMAL PERFORMANCE AND IS EXPOSED PAD ENHANCES THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND INSIDE THE PACKAGE. ELECTRICALLY CONNECTED TO GND INSIDE THE PACKAGE.
004 003
CONNECT THE EXPOSED PAD TO THE GROUND PLANE ON CONNECT THE EXPOSED PAD TO THE GROUND PLANE ON
1043-
THE BOARD TO ENSURE PROPER OPERATION. THE BOARD TO ENSURE PROPER OPERATION.
1043- 1 1 Figure 3. 8-Lead LFCSP Pin Configuration Figure 4. 8-Lead SOIC Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Description
1 VREG Regulated Input Supply to LDO Amplifier. Bypass VREG to GND with a 10 µF or greater capacitor. Do not connect a load to ground. 2 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 10 µF or greater capacitor. 3 BYP Low Noise Bypass Capacitor. Connect a 1 µF capacitor to GND to reduce noise. Do not connect a load to ground. 4 GND Ground Connection. 5 REF_SENSE REF_SENSE must be connected to the REF pin for proper operation. Do not connect to VOUT or GND. 6 REF Low Noise Reference Voltage Output. Bypass REF to GND with a 1 µF capacitor. Short REF_SENSE to REF for fixed output voltages. Do not connect a load to ground. 7 EN Enable. Drive EN high to turn on the regulator and drive EN low to turn off the regulator. For automatic startup, connect EN to VIN. 8 VIN Regulator Input Supply. Bypass VIN to GND with a 10 µF or greater capacitor. EPAD Exposed Pad on the Bottom of the Package. The exposed pad enhances thermal performance and is electrically connected to GND inside the package. Connect the exposed pad to the ground plane on the board to ensure proper operation. Rev. 0 | Page 6 of 24 Document Outline Features Applications General Description Typical Application Circuit Table of Contents Revision History Specifications Input and Output Capacitor Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input and VREG Capacitor REF Capacitor BYP Capacitor Capacitor Properties Enable (EN) and Undervoltage Lockout (UVLO) Start-Up Time REF, BYP, and, VREG pins Current-Limit and Thermal Overload Protection Thermal Considerations Thermal Characterization Parameter (ΨJB) Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide