Datasheet ADP7142 (Analog Devices) - 5

Data Sheet ADP7142 ABSOLUTE MAXIMUM RATINGS Table 3.
θJA of the package is based on modeling and calculation using a 4-layer board. The θJA is highly dependent on the application
Parameter Rating
and board layout. In applications where high maximum power VIN to GND –0.3 V to +44 V dissipation exists, close attention to thermal board design is VOUT to GND –0.3 V to VIN required. The value of θJA may vary, depending on PCB material, EN to GND –0.3 V to +44 V layout, and environmental conditions. The specified values of θJA SENSE/ADJ to GND –0.3 V to +6 V are based on a 4-layer, 4 inches × 3 inches circuit board. See SS to GND –0.3 V to VIN or +6 V JESD51-7 and JESD51-9 for detailed information on the board (whichever is less) construction. Storage Temperature Range –65°C to +150°C Junction Temperature (T Ψ J) 150°C JB is the junction-to-board thermal characterization parameter Operating Ambient Temperature –40°C to +125°C with units of °C/W. The ΨJB of the package is based on (TA) Range modeling and calculation using a 4-layer board. The JESD51-12, Soldering Conditions JEDEC J-STD-020 Guidelines for Reporting and Using Electronic Package Thermal Stresses at or above those listed under Absolute Maximum Information, states that thermal characterization parameters are Ratings may cause permanent damage to the product. This is a not the same as thermal resistances. ΨJB measures the component stress rating only; functional operation of the product at these power flowing through multiple thermal paths rather than a or any other conditions above those indicated in the single path as in thermal resistance (θJB). Therefore, ΨJB thermal operational section of this specification is not implied. paths include convection from the top of the package as well as Operation beyond the maximum operating conditions for radiation from the package, factors that make ΨJB more useful extended periods may affect product reliability. in real-world applications. Maximum TJ is calculated from the board temperature (TB) and PD using the formula
THERMAL DATA
TJ = TB + (PD × ΨJB) (2) Absolute maximum ratings apply individually only, not in combination. The ADP7142 can be damaged when the junction See JESD51-8 and JESD51-12 for more detailed information temperature limits are exceeded. Monitoring ambient temperature about ΨJB. does not guarantee that TJ is within the specified temperature
THERMAL RESISTANCE
limits. In applications with high power dissipation and poor θJA, θJC, and ΨJB are specified for the worst-case conditions, that thermal resistance, the maximum ambient temperature may is, a device soldered in a circuit board for surface-mount packages. have to be derated. In applications with moderate power dissipation and low printed
Table 4. Thermal Resistance
circuit board (PCB) thermal resistance, the maximum ambient
Package Type θJA θJC ΨJB Unit
temperature can exceed the maximum limit as long as the 6-Lead LFCSP 72.1 42.3 47.1 °C/W junction temperature is within specification limits. The 8-Lead SOIC 52.7 41.5 32.7 °C/W junction temperature of the device is dependent on the ambient 5-Lead TSOT 170 N/A1 43 °C/W temperature, the power dissipation (P D) of the device, and the 1 N/A means not applicable. junction-to-ambient thermal resistance of the package (θJA).
ESD CAUTION
Maximum TJ is calculated from the TA and PD using the formula TJ = TA + (PD × θJA) (1) Rev. H | Page 5 of 23 Document Outline Features Applications Typical Application Circuits General Description Revision History Specifications Input and Output Capacitance, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information ADIsimPower Design Tool Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Programable Precision Enable Soft Start Noise Reduction of the ADP7142 in Adjustable Mode Effect of Noise Reduction on Start-Up Time Current-Limit and Thermal Overload Protection Thermal Considerations Printed Circuit Board Layout Considerations Outline Dimensions Ordering Guide