Datasheet ADCMP566 (Analog Devices)
Hersteller | Analog Devices |
Beschreibung | Dual Ultrafast Voltage Comparator |
Seiten / Seite | 16 / 1 — FEATURES. FUNCTIONAL BLOCK DIAGRAM. 250 ps propagation delay input to … |
Dateiformat / Größe | PDF / 213 Kb |
Dokumentensprache | Englisch |
FEATURES. FUNCTIONAL BLOCK DIAGRAM. 250 ps propagation delay input to output. 50 ps propagation delay dispersion. NONINVERTING
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Dual Ultrafast Voltage Comparator ADCMP566
FEATURES FUNCTIONAL BLOCK DIAGRAM 250 ps propagation delay input to output 50 ps propagation delay dispersion NONINVERTING Differential ECL compatible outputs INPUT Q OUTPUT Differential latch control ADCMP566 INVERTING Q OUTPUT Robust input protection INPUT Input common-mode range −2.0 V to +3.0 V LATCH ENABLE LATCH ENABLE Input differential range ±5 V INPUT INPUT ESD protection >3 kV HBM, >200 V MM 03633-0-001 Power supply sensitivity > 65 dB
Figure 1.
200 ps minimum pulsewidth 5 GHz equivalent input rise time bandwidth GENERAL DESCRIPTION Typical output rise/fall of 165 ps
The ADCMP566 is an ultrafast voltage comparator fabricated
APPLICATIONS
on Analog Devices’ proprietary XFCB process. The device
High speed instrumentation
features 250 ps propagation delay with less than 35 ps overdrive
Scope and logic analyzer front ends
dispersion. Overdrive dispersion, a particularly important
Window comparators
characteristic of high speed comparators, is a measure of the
High speed line receivers and signal restoration
difference in propagation delay under differing overdrive
Threshold detection
conditions.
Peak detection
A fast, high precision differential input stage permits consis-
High speed triggers
tent propagation delay with a wide variety of signals in the
Patient diagnostics
common-mode range from −2.0 V to +3.0 V. Outputs are
Disk drive read channel detection
complementary digital signals fully compatible with ECL 10 K
Hand-held test instruments
and 10 KH logic families. The outputs provide sufficient drive
Zero-crossing detectors
current to directly drive transmission lines terminated in 50 Ω
Clock drivers
to −2 V. A latch input is included, which permits tracking,
Automatic test equipment
track-and-hold, or sample-and-hold modes of operation. The ADCMP566 is available in a 32-lead LFCSP package.
Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.326.8703 © 2003 Analog Devices, Inc. All rights reserved.
Document Outline SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TIMING INFORMATION APPLICATION INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE