Datasheet ADCMP565 (Analog Devices) - 6

ADCMP565 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
QA QA NC QB QB 3 2 1 20 19 GND 4 18 PIN 1 GND LEA 5 IDENTIFIER 17 LEB NC 6 16 NC ADCMP565 LEA 7 TOP VIEW 15 LEB (Not to Scale) V 8 14 EE VCC 9 10 11 12 13 A B NA NC NB –IN +I +I –IN NC = NO CONNECT
02820-0-002 Figure 2. ADCMP565 Pin Configuration
Table 3. ADCMP565 Pin Descriptions Pin No. Mnemonic Function
1 NC No Connect. Leave pin unconnected. 2 QA One of two complementary outputs for Channel A. QA will be at logic high if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the LEA description (Pin 5) for more information. 3 QA One of two complementary outputs for Channel A. QA will be at logic low if the analog voltage at the noninverting input is greater than the analog voltage at the inverting input (provided the comparator is in the compare mode). See the LEA description (Pin 5) for more information. 4 GND Analog Ground 5 LEA One of two complementary inputs for Channel A Latch Enable. In the compare mode (logic high), the output will track changes at the input of the comparator. In the latch mode (logic low), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven in conjunction with LEA. 6 NC No Connect. Leave pin unconnected or attach to GND (internally connected to GND). 7 LEA One of two complementary inputs for Channel A Latch Enable. In the compare mode (logic low), the output will track changes at the input of the comparator. In the latch mode (logic high), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEA must be driven in conjunction with LEA. 8 VEE Negative Supply Terminal 9 −INA Inverting analog input of the differential input stage for Channel A. The inverting A input must be driven in conjunction with the noninverting A input. 10 +INA Noninverting analog input of the differential input stage for Channel A. The noninverting A input must be driven in conjunction with the inverting A input. 11 NC No Connect. Leave pin unconnected. 12 +INB Noninverting analog input of the differential input stage for Channel B. The noninverting B input must be driven in conjunction with the inverting B input. 13 −INB Inverting analog input of the differential input stage for Channel B. The inverting B input must be driven in conjunction with the noninverting B input. 14 VCC Positive Supply Terminal 15 LEB One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic low), the output will track changes at the input of the comparator. In the latch mode (logic high), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven in conjunction with LEB. 16 NC No Connect. Leave pin unconnected or attach to GND (internally connected to GND). 17 LEB One of two complementary inputs for Channel B Latch Enable. In the compare mode (logic high), the output will track changes at the input of the comparator. In the latch mode (logic low), the output will reflect the input state just prior to the comparator’s being placed in the latch mode. LEB must be driven in conjunction with LEB. Rev. 0 | Page 6 of 16 Document Outline SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TIMING INFORMATION APPLICATION INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE