Datasheet ADCMP600, ADCMP601, ADCMP602 (Analog Devices) - 8

HerstellerAnalog Devices
BeschreibungRail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators
Seiten / Seite16 / 8 — ADCMP600/ADCMP601/ADCMP602. TYPICAL PERFORMANCE CHARACTERISTICS. 800. IOL …
RevisionA
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DokumentenspracheEnglisch

ADCMP600/ADCMP601/ADCMP602. TYPICAL PERFORMANCE CHARACTERISTICS. 800. IOL VS VOL. 600. CC = 2.5V. CC = 5.5V. OH VS VOH. 400. mA). 200. µ (

ADCMP600/ADCMP601/ADCMP602 TYPICAL PERFORMANCE CHARACTERISTICS 800 IOL VS VOL 600 CC = 2.5V CC = 5.5V OH VS VOH 400 mA) 200 µ (

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ADCMP600/ADCMP601/ADCMP602 TYPICAL PERFORMANCE CHARACTERISTICS
VCCI = VCCO = 2.5 V, TA = 25°C, unless otherwise noted.
800 20 IOL VS VOL 600 15 V V I CC = 2.5V CC = 5.5V OH VS VOH 400 10 mA) A) 200 ( 5 µ ( NT NT 0 0 –200 CURRE –5 AD CURRE O L –400 –10 –600 –15
007 011
–800
05914-
–20
09514-
–1 0 1 2 3 4 5 6 7 –1.0 –0.6 –0.2 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4 LE/HYS (V) VOUT (V)
Figure 6. LE/HYS Pin I/V Characteristics Figure 9. VOH/VOL vs. Current Load
150 250 100 VCC = 2.5V VCC = 5.5V 200 50 V) A) VCC = 5.5V µ 150 ( S (m NT 0 ESI ER 100 CURRE –50 YST H 50 –100 VCC = 2.5V
027 008
–150
05914-
0
05914-
–1 0 1 2 3 4 5 6 7 50 150 250 350 450 550 650 SHUTDOWN PIN VOLTAGE (V) HYSTERESIS RESISTOR (kΩ)
Figure 7. SDN Pin I/V Characteristics Figure 10. Hysteresis vs. RHYS Control Resistor
20 450 VCC = 2.5V 400 15 350 10 LOT 1 V) 300 5 S (m 250 A) µ ESI ( 0 LOT 2 I B ER 200 –5 YST H 150 IB @ +125°C –10 100 IB @ +25°C –15 50
026 005
IB @ –40°C
05914- 05914-
–20 0 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 –5 –10 –15 –20 COMMON-MODE VOLTAGE (V) PIN CURRENT (µA)
Figure 8. Input Bias Current vs. Input Common Mode Figure 11. Hysteresis vs. Pin Current Rev. A | Page 8 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Timing Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Application Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Using/Disabling the Latch Feature Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Application Circuits Outline Dimensions Ordering Guide