Datasheet ADCMP609 (Analog Devices) - 9

HerstellerAnalog Devices
BeschreibungRail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator
Seiten / Seite12 / 9 — Data Sheet. ADCMP609. 500mV OVERDRIVE. INPUT VOLTAGE. 10mV OVERDRIVE. VN …
RevisionC
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DokumentenspracheEnglisch

Data Sheet. ADCMP609. 500mV OVERDRIVE. INPUT VOLTAGE. 10mV OVERDRIVE. VN ± VOS. DISPERSION. Q/Q OUTPUT. 1V/ns. 10V/ns. 160 150 140. 130. 120. 110

Data Sheet ADCMP609 500mV OVERDRIVE INPUT VOLTAGE 10mV OVERDRIVE VN ± VOS DISPERSION Q/Q OUTPUT 1V/ns 10V/ns 160 150 140 130 120 110

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Data Sheet ADCMP609 500mV OVERDRIVE
The customary technique for introducing hysteresis into a comparator uses positive feedback from the output back to the
INPUT VOLTAGE
input. One limitation of this approach is that the amount of hysteresis varies with the output logic levels, resulting in
10mV OVERDRIVE
hysteresis that is not symmetric about the threshold. The
VN ± VOS
external feedback network can also introduce significant parasitics that reduce high speed performance and can even induce oscillation in some cases.
DISPERSION
2 -01 8 The ADCMP609 comparator offers a programmable hysteresis
Q/Q OUTPUT
91 06 feature that significantly improves accuracy and stability. Figure 12. Propagation Delay—Overdrive Dispersion Connecting an external pull-down resistor or a current source from the HYS pin to ground varies the amount of hysteresis in a
INPUT VOLTAGE
predictable, stable manner. Leaving the HYS pin disconnected
1V/ns
or driving it high removes the hysteresis. The maximum hysteresis that can be applied using this pin is approximately
VN ± VOS 10V/ns
160 mV. Figure 15 illustrates the amount of hysteresis applied as a function of the external resistor value.
160 150 140 DISPERSION
3
130
01 8-
Q/Q OUTPUT
91
120
06
110
Figure 13. Propagation Delay—Slew Rate Dispersion
V) 100 (m IS 90 COMPARATOR HYSTERESIS ES 80
The addition of hysteresis to a comparator is often desirable in a
ER 70 ST 60 Y
noisy environment, or when the differential input amplitudes
H 50 VCC = 2.5
are relatively small or slow moving. The transfer function for a
40
comparator with hysteresis is shown in Figure 14. As the input
30 20 VCC = 5.5
06 voltage approaches the threshold (0.0 V, in Figure 14) from below 0 8-
10
91 the threshold region in a positive direction, the comparator 06
0 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300
switches from low to high when the input crosses +VH/2. The new
HYS RESISTOR (kΩ)
switching threshold becomes −VH/2. The comparator remains in Figure 15. Hysteresis vs. HYS Resistor the high state until the threshold, −VH/2, is crossed from below the The HYS pin appears as a 1.25 V bias voltage seen through a threshold region in a negative direction. In this manner, noise or series resistance of 7 kΩ ± 20% throughout the hysteresis control feedback output signals centered on 0.0 V input cannot cause range. The advantages of applying hysteresis in this manner are the comparator to switch states unless it exceeds the region improved accuracy, improved stability, reduced component bounded by ±VH/2. count, and maximum versatility. An external bypass capacitor is
OUTPUT
not recommended on the HYS pin because it impairs the latch function and often degrades the jitter performance of the device.
VOH
With the pin driven low, hysteresis may become large, but in this device, the effect is not reliable or intended as a latch function.
CROSSOVER BIAS POINT
Rail-to-rail inputs of this type, in both op amps and comparators,
VOL
have a dual front-end design. Certain devices are active near the VCC rail, and others are active near the VEE rail. At some predeter- mined point in the common-mode range, a crossover occurs. At
0.0V INPUT
4
–V +V
this point, normally VCC/2, the direction of the bias current reverses
H H
-01 18
2 2
69 0 and there are changes in measured offset voltages and currents. Figure 14. Comparator Hysteresis Transfer Function The ADCMP609 slightly elaborates on this scheme. The crossover points are at approximately 0.8 V and 1.6 V. Rev. C | Page 9 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE