Datasheet ADCMP391, ADCMP392, ADCMP393 (Analog Devices) - 10

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ADCMP391/ADCMP392/ADCMP393 Data Sheet THEORY OF OPERATION BASIC COMPARATOR POWER-UP BEHAVIOR
In its most basic configuration, a comparator can be used to On power-up, when VCC reaches 0.9 V, the ADCMP391/ convert an analog input signal to a digital output signal (see ADCMP392/ADCMP393 is guaranteed to assert an output low Figure 26). The analog signal on INx+ is compared to the logic. When the voltage on the VCC pin exceeds UVLO, the voltage on INx−, and the voltage at OUTx is either high or low, comparator inputs take control. depending on whether INx+ is at a higher or lower potential
CROSSOVER BIAS POINT
than INx−, respectively. Rail-to-rail inputs of this type of architecture, in both op amps
VCC V+
and comparators, have a dual front-end design. PMOS devices are inactive near the VCC rail, and NMOS devices are inactive near
INx+
GND. At some predetermined point in the common-mode range, a
VIN OUTx INx–
crossover occurs. At this point, normally 0.8 V and VCC − 0.8 V, the
VREF
measured offset voltages change.
COMPARATOR HYSTERESIS
In noisy environments, or when the differential input amplitudes
VOUT V+
are relatively small or slow moving, adding hysteresis (VHYS) to the comparator is often desirable. The transfer function for a
VREF
comparator with hysteresis is shown in Figure 27. As the input
0V
voltage approaches the threshold (0 V in Figure 27) from below
t
226 the threshold region in a positive direction, the comparator
VIN
12206- switches from low to high when the input crosses +VHYS/2. The Figure 26. Basic Comparator and Input and Output Signals new switch threshold becomes −VHYS/2. The comparator remains
RAIL-TO-RAIL INPUT (RRI)
in the high state until the −VHYS/2 threshold is crossed from Using a CMOS nonRRI stage (that is, a single differential pair) below the threshold region in a negative direction. In this limits the input voltage to approximately one gate-to-source manner, noise or feedback output signals centered on the 0 V voltage (V input cannot cause the comparator to switch states unless it GS) away from one of the supply lines. Because VGS for normal operation is commonly more than 1 V, a single differential exceeds the region bounded by ±VHYS/2. pair input stage comparator greatly restricts the al owable input
OUTPUT
voltage. This restriction can be quite limiting with low voltage supplies. To resolve this issue, RRI stages allow the input signal range to extend up to the supply voltage range. In the case of the
VOH
ADCMP391/ADCMP392/ADCMP393, the inputs continue to operate 200 mV beyond the supply rails.
OPEN-DRAIN OUTPUT VOL
The ADCMP391/ADCMP392/ADCMP393 have an open-drain output stage that requires an external resistor to pul up to the logic high voltage level when the output transistor is switched
0V INPUT
227 off. The pull-up resistor must be large enough to avoid excessive
–V +V HYST HYST 2 2
power dissipation, but small enough to switch logic levels 12206- Figure 27. Comparator Hysteresis Transfer Function reasonably quickly when the comparator output is connected to other digital circuitry. The rise time of the open-drain output depends on the pul -up resistor (RPULLUP) and load capacitor (CL) used. The rise time can be calculated by tR = 2.2 RPULLUP CL (1) Rev. D | Page 10 of 17 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION BASIC COMPARATOR RAIL-TO-RAIL INPUT (RRI) OPEN-DRAIN OUTPUT POWER-UP BEHAVIOR CROSSOVER BIAS POINT COMPARATOR HYSTERESIS TYPICAL APPLICATIONS ADDING HYSTERESIS WINDOW COMPARATOR FOR POSITIVE VOLTAGE MONITORING WINDOW COMPARATOR FOR NEGATIVE VOLTAGE MONITORING PROGRAMMABLE SEQUENCING CONTROL CIRCUIT MIRRORED VOLTAGE SEQUENCER EXAMPLE THRESHOLD AND TIMEOUT PROGRAMMABLE VOLTAGE SUPERVISOR OUTLINE DIMENSIONS ORDERING GUIDE