Datasheet AK5706 (Asahi Kasei Microdevices) - 9

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8. Electrical Characteristics 8.1. Microphone & ADC Analog Characteristics (AVDD = 3.3V: AVDDMD bit = “1”)
(Ta = 25 C; AVDD = 3.3 V, TVDD = 1.8 V; VSS1 = VSS2 = 0 V; Signal Frequency = 1 kHz; 24-bit Data; External Slave Mode; fs = 48 kHz, BCLK = 64 fs; Measurement Bandwidth = 20 Hz to 20 kHz unless otherwise specified)
Parameter Min. Typ. Max. Unit MIC Amplifier 1/2:
AIN1P/N, AIN2P/N pins Input Resistance 140 200 260 k Gain Setting 0 - +30 dB MIC-Amp 1/2 Gain Step Width 2 3 4 dB
MIC Power Supply:
MPWR1 pin (Low-power Mode) MICL1[1:0] bits = “00” 1.0 1.1 1.2 MICL1[1:0] bits = “01” 1.2 1.3 1.4 Output Voltage (Note 11) V MICL1[1:0] bits = “10” 1.7 1.8 1.9 MICL1[1:0] bits = “11” - AVDD - Load Resistance (Except for MICL1[1:0] bits = “11”) 3.0 - 200 k Load Capacitance (Except for MICL1[1:0] bits = “11”) - - 130 pF MICL1[1:0] bits = “00” - −72 - Output Noise Level MICL1[1:0] bits = “01” - −71 - dBV (A-weighted) MICL1[1:0] bits = “10” - −68 - PSRR (1 kHz) (Note 14) - 15 - dB
MIC Power Supply:
MPWR1 pin (Bypass Mode), MPWR2 pin MICL2[1:0] bits = “00” 2.6 2.8 3.0 Output Voltage MICL2[1:0] bits = “01” 2.3 2.5 2.7 V (Note 12, Note 13) MICL2[1:0] bits = “10” 1.7 1.8 1.9 MICL2[1:0] bits = “11” - AVDD - Load Resistance (Except for MICL2[1:0] bits = “11”) 1.0 - - k Load Capacitance (Except for MICL2[1:0] bits = “11”) - - 130 pF MICL2[1:0] bits = “00” - −106 - Output Noise Level MICL2[1:0] bits = “01” - −107 - dBV (A-weighted) MICL2[1:0] bits = “10” - −112 - PSRR (1 kHz) (Note 14) - 60 - dB Note 11. Output voltage for MPWR1 (Low-power Mode) is fixed regardless of the AVDD voltage. When MICL1[1:0] bits are “11”, MPWR1 outputs AVDD via internal switch. Note 12. The output voltage is proportional to AVDD. MICL2[1:0] bits = “00”: Typ. 2.8 x AVDD / 3.3 V, “01”: Typ. 2.5 x AVDD / 3.3 V, “10”: Typ. 1.8 x AVDD / 3.3 V. When MICL2[1:0] bits are “11”, MPWR1/2 output AVDD via internal switch. Note 13. Configuring the output voltage for MPWR1 (Bypass Mode) will set the same output voltage for MPWR2. The setting of MICL2[1:0] bits = “10” is only available in Bypass Mode. Note 14. PSRR for all power supplies is measured with respect to a 100 mVpp sine wave input. 200500012-E-00-PB 2020/05 - 9 - Document Outline 1. General Description 2. Features 3. Table of Contents 4. Block Diagram 5. Pin Configurations and Functions 5.1. Pin Configurations 5.2. Functions 5.3. Handling of Unused Pins 5.4. Pin State in Power-down Mode 6. Absolute Maximum Ratings 7. Recommended Operating Conditions 8. Electrical Characteristics 8.1. Microphone & ADC Analog Characteristics (AVDD = 3.3V: AVDDMD bit = “1”) 8.2. Microphone & ADC Analog Characteristics (AVDD = 1.8V: AVDDMD bit = “0”) 8.3. Acoustic Activity Analyzer Characteristics 8.4. PLL, AOSC Characteristics 8.5. LDO Characteristics 8.6. VCOM Characteristics 8.7. Power Supply Current 8.8. Power Consumption for Each Operation Mode (Typ.) 8.9. Filter Characteristics 8.9.1. Short Delay Sharp Roll-off Filter (ADVF bit = “0”) 8.9.2. Voice Filter (ADVF bit = “1”) 8.10. DC Characteristics 8.11. Switching Characteristics 9. Package 9.1. Outline Dimensions 9.2. Material & Lead finish 9.3. Marking 10. Ordering Guide 11. Revision History IMPORTANT NOTICE