Datasheet ADN8834 (Analog Devices) - 9

Data Sheet ADN8834 0.10 0.20 T = 15°C VIN = 3.3V, ITEC = 0A 0.08 T = 25°C VIN = 3.3V, ITEC = 0.5A, COOLING %) T = 35°C 0.15 VIN = 3.3V, ITEC = 0.5A, HEATING R ( T = 45°C 0.06 T = 55°C VIN = 5.0V, ITEC = 0A 0.10 RRO VIN = 5.0V, ITEC = 0.5A, COOLING 0.04 E V E IN = 5.0V, ITEC = 0.5A, HEATING 0.05 0.02 AG LT %) ( 0 F 0 ] VO RE 1 V –0.02 UT –0.05 O [V –0.04 T U –0.10 –0.06 EMPO –0.15 T –0.08 –0.10 –0.20 0 20 40 60 80 100 120 140 160 180 200
109
0 1 2 3 4 5 6 7 8 9 10
201
TIME (Seconds) LOAD CURRENT AT VREF (mA)
12954- 12954- Figure 10. Thermal Stability over Ambient Temperature at VIN = 3.3 V, Figure 13. VREF Load Regulation VTEMPSET = 1 V
0.10 20 T = 15°C VIN = 3.3V T = 25°C 0.08 VIN = 5V %) T = 35°C 15 T = 45°C %) R ( 0.06 T = 55°C R ( 10 RRO 0.04 E RRO E E 5 0.02 AG NG LT 0 ADI 0 ] VO 1 RE –0.02 UT NT O –5 [V –0.04 T U –10 –0.06 C CURRE E EMPO IT T –15 –0.08 –0.10 –20 0 20 40 60 80 100 120 140 160 180 200
10 1
0 0.5 1.0 1.5
010
TIME (Seconds)
12954-
TEC CURRENT (A)
12954- Figure 11. Thermal Stability over Ambient Temperature at VIN = 3.3 V, Figure 14. ITEC Current Reading Error vs. TEC Current in Cooling Mode VTEMPSET = 1.5 V
1.0 20 V V IN = 2.7V AT NO LOAD IN = 3.3V V 0.8 V IN = 3.3V AT NO LOAD IN = 5V VIN = 5.5V AT NO LOAD 15 V %) IN = 2.7V AT 5mA LOAD 0.6 VIN = 3.3V AT 5mA LOAD R ( V 10 IN = 5.5V AT 5mA LOAD 0.4 RRO E %) 5 0.2 NG R ( ADI 0 0 RRO E RE F –0.2 NT –5 REV –0.4 –10 C CURRE –0.6 E IT –15 –0.8 –1.0
1
–20
11 013
–50 0 50 100 150 –1.5 –1.0 –0.5 0 AMBIENT TEMPERATURE (°C)
12954-
TEC CURRENT (A)
12954- Figure 12. V Figure 15. ITEC Current Reading Error vs. TEC Current in Heating Mode REF Error vs. Ambient Temperature Rev. B | Page 9 of 27 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Detailed Functional Block Diagram Theory of Operation Analog PID Control Digital PID Control Powering the Controller Enable and Shutdown Oscillator Clock Frequency External Clock Operation Connecting Multiple ADN8834 Devices Temperature Lock Indicator (LFCSP Only) Soft Start on Power-Up TEC Voltage/Current Monitor Voltage Monitor Current Monitor Maximum TEC Voltage Limit Using a Resistor Divider to Set the TEC Voltage Limit Maximum TEC Current Limit Using a Resistor Divider to Set the TEC Current Limit Applications Information Signal Flow Thermistor Setup Thermistor Amplifier (Chopper 1) PID Compensation Amplifier (Chopper 2) MOSFET Driver Amplifiers PWM Output Filter Requirements Inductor Selection Capacitor Selection Input Capacitor Selection Power Dissipation PWM Regulator Power Dissipation Conduction Loss (PCOND) Switching Loss (PSW) Transition Loss (PTRAN) Linear Regulator Power Dissipation PCB Layout Guidelines Block Diagrams and Signal Flow Guidelines for Reducing Noise and Minimizing Power Loss General PCB Layout Guidelines PWM Power Stage Layout Guidelines Linear Power Stage Layout Guidelines Placing the Thermistor Amplifier and PID Components Example PCB Layout Using Two Layers Outline Dimensions Ordering Guide