Datasheet TB9120AFTG (Toshiba) - 2

TB9120AFTG 4 Block diagram BSTBY Standby Control OSC-Clock Motor OSCM DMODE0 Converter Oscillator DMODE1 DMODE2 Step System VccOUT VccOUT Resolution Oscillator Regulator TORQUE0 Selector Signal VDD Decode TORQUE1 Logic VccOUT VBAT VBAT CW/CCW POR UVLO CLK START Current Current VREF Level Reference ENABLE Setting Setting MO Angle Monitor Motor Control Logic Pre- Pre- driver driver TSD Error DIAG ISD Output SDT Stall SD Error SD Detection O utput Load Open Detection GND Current Current Comp Comp R O O O O R SA U U UT UT SB TA TA - B B - + B+ -
Besides the above, there are TEST 1 and TEST 2 as the test pins for shipping inspection. Some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. © 2020 2 2020-05-12 Toshiba Electronic Devices & Storage Corporation