Datasheet MAX32670 (Maxim)

Click
here
for production status of specific part numbers.
MAX32670 High Reliability, Ultra-Low Power Microcontroller Powered by Arm Cortex M4 Processor with FPU for Industrial and IoT General Description Benefits and Features
In the Darwin family, the MAX32670 is an ultra-low power, ● High-Efficiency Microcontroller for Low Power, High cost-effective, high reliability 32-bit microcontroller en- Reliability Devices abling designs with complex sensor processing without • Arm Cortex-M4 Core with FPU Up to 100MHz compromising battery life. It combines a flexible and ver- • 384KB Flash Memory with Error Correction satile power management unit with the powerful Arm® • 160KB SRAM (128KB with ECC Enabled), Cortex®-M4 processor with floating point unit (FPU). The Optionally Preserved in Lowest Power Modes MAX32670 also offers legacy designs an easy and cost • 16KB Unified Cache with ECC optimal upgrade path from 8- or 16-bit microcontrollers. • UART Bootloader The device integrates up to 384KB of flash and 160KB of • Dual or Single-Supply Operation SRAM to accommodate application and sensor code. er- • Ultra-Low 0.9-1.1V VCORE Supply Voltage ror correction coding (ECC), capable of single error cor- • Internal LDO Operation from Single Supply 1.7V rection and double error detection (SEC-DED), is imple- to 3.6V mented over the entire flash, RAM, and cache to ensure • Wide Operating Temperature: -40°C to +105°C ultra-reliable code execution for demanding applications. ● Flexible Clocking Schemes Additional features such as the two windowed watchdog • Internal High Speed 100MHz Oscillator timers with fully flexible and independent clocking have • Internal Low Power 7.3728MHz and Ultra-Low been added to further enhance reliable operation. Brown- Power 80kHz Oscillators out detection ensures proper operation during power- • 14MHz to 32MHz Oscillator (External Crystal down and power-up events and unexpected supply tran- Required) sients. • 32.768kHz Oscillator (External Crystal Required) Multiple high-speed peripherals such as 3.4MHz I2C, • External Clock Input for the Core 50MHz SPI, and 4MBAUD UARTs are included to maxi- • External Clock Input for the LPUART and LPTMR mize communication bandwidth. In addition, a low-power ● Power Management Maximizes Uptime for Battery UART is available for operation in the lowest power sleep Applications modes to facilitate wakeup on activity without any loss of • 44μA/MHz Active at 0.9V Up to 12MHz data. A total of six timers with I/O capability are provided, • 50μA/MHz Active at 1.1V Up to 100MHz including two low-power timers to enable pulse counting, • 2.6μA Full Memory Retention Power in Backup capture/compare and PWM generation even in the low- Mode at VDD = 1.8V est power sleep modes. The device packs all this capabil- • 350nA Ultra-Low Power RTC at VDD = 1.8V ity in tiny form factors: 5mm x 5mm 40-pin TQFN-EP and • Wake from LPUART or LPTMR 1.7mm x 2.2mm 24-bump WLP packages. ● Optimal Peripheral Mix Provides Platform Scalability • Up to 31 General-Purpose I/O Pins
Applications
• Up to Three SPI Master/Slave (Up to 50MHz) ● Smart Sensor Controller • Up to Three 4-Wire UART (Up to 4MBAUD) ● Industrial Sensors • One Low Power UART (LPUART) ● Optical Communication Modules • Up to Three I2C Master/Slave 3.4Mbps High Speed ● Secure Radio Modem Controller • Eight-Channel Standard DMA Controller ● Battery-Powered Medical Devices • Up to Four 32-Bit Timers (TMR) ● System Housekeeping Controller • Up to Two Low Power 32-Bit Timers (LPTMR) ● Algorithm Coprocessor • Two Windowed Watchdog Timers
Ordering Information appears at end of data sheet.
• One I2S Slave for Digital Audio Interface Arm and Cortex are registered trademarks of Arm Limit- ● Security and Integrity ed(or its subsidiaries) in the US and/or elsewhere. • Available Secure Boot • AES 128/192/256 Hardware Acceleration Engine • TRNG Compliant to SP800-90B • 32-Bit CRC Acceleration Engine 19-100782; Rev 0; 3/20 Document Outline General Description Applications Benefits and Features Simplified Block Diagram Absolute Maximum Ratings Package Information 40 TQFN-EP Electrical Characteristics Electrical Characteristics (continued) Electrical Characteristics—SPI Electrical Characteristics—SPI (continued) Electrical Characteristics—I2C Electrical Characteristics—I2C (continued) Electrical Characteristics—I2S Slave Pin Configuration 40 TQFN Pin Description 40 TQFN Detailed Description MAX32670 Arm Cortex-M4 Processor with FPU Engine Memory Internal Flash Memory Internal SRAM Clocking Scheme General-Purpose I/O and Special Function Pins Standard DMA Controller Power Management Power Management Unit Active Mode Sleep Mode DeepSleep Mode Backup Mode Storage Mode Real-Time Clock Windowed Watchdog Timer (WWDT) 32-Bit Timer/Counter/PWM (TMR, LPTMR) Serial Peripherals I2C Interface (I2C) Serial Peripheral Interface (SPI) I2S Interface (I2S) UART (UART, LPUART) Security AES True Random Number Generator (TRNG) CRC Module Secure Boot Debug and Development Interface (SWD) Applications Information Bypass Capacitors Ordering Information Revision History