Datasheet LTM4678 (Analog Devices)

link to page 44 LTM4678 Dual 25A or Single 50A µModule Regulator with Digital Power System Management
FEATURES DESCRIPTION
n
Dual Digitally Adjustable Analog Loops with Digital
The LTM®4678 is a dual 25A or single 50A step-down
Interface for Control and Monitoring
µModule® (power module) DC/DC regulator featuring n
Wide Input Voltage Range: 4.5V to 16V
remote configurability and telemetry-monitoring of power n
Output Voltage Range: 0.5V to 3.4V
management parameters over PMBus—an open standard n
±0.5% Maximum DC Output Error Over Temperature
I2C-based digital interface protocol . The LTM4678 n
±3.5% Current Readback Accuracy, –20°C to 125°C
is comprised of digitally programmable analog control n
Sub-Milliohm DCR Current Sensing
loops, precision mixed-signal circuitry, EEPROM, power n
Integrated Input Current Sense Amplifier
MOSFETs, inductors and supporting components. n
400kHz PMBus-Compliant I2C Serial Interface
The LTM4678’s 2-wire serial interface allows outputs to n
Supports Telemetry Polling Rates up to 125Hz
be margined, tuned and ramped up and down at program- n
Integrated 16-Bit
∆Σ
ADC
mable slew rates with sequencing delay times. True input n
Constant Frequency Current Mode Control
current sense, output currents and voltages, output power, n
Parallel and Current Share Up to 250A
temperatures, uptime and peak values are readable. Custom n 16mm × 16mm × 5.86mm CoP-BGA Package configuration of the EEPROM contents is not required. At
Readable Data
start-up, output voltages, switching frequency, and channel n Input and Output Voltages, Currents, and Temperatures phase angle assignments can be set by pin-strapping resis- n Running Peak Values, Uptime, Faults and Warnings tors. The LTpowerPlay® GUI and DC1613 USB-to-PMBus n Onboard EEPROM Fault Log Record converter and demo kits are available.
Writable Data and Configurable Parameters
n Output Voltage, Voltage Sequencing and Margining The LTM4678 is offered in a 16mm × 16mm × 5.86mm n Digital Soft-Start/Stop Ramp, Program Analog Loop CoP-BGA package available with SnPb or RoHS compliant n OV/UV/OT, UVLO, Frequency and Phasing terminal finish.
APPLICATIONS
All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. Patents including 5408150, 5481178, 5705919, 5929620, 6144194, 6177787, 6580258, 7420359, 8163643. Licensed under U.S. Patent 7000125 and other related patents worldwide. n System Optimization, Characterization and Data Min- ing in Prototype, Production and Field Environments
TYPICAL APPLICATION Dual 25A µModule Regulator with Digital Using PMBus and LTpowerPlay to Monitor Telemetry and Margin Interface for Control and Monitoring* VOUT0/VOUT1 During Load Pattern Tests, 10Hz Polling Rate, 12VIN
VOUT0
Output Voltage Readback, VOUT Margined 7.5% Low Input Current Readback
4.5V to 16V (FROM V IN+ OUT0 ADJUSTABLE 1.1 1.9 2.6 4.3 4.5V TO 5.75V, V + UP TO 25A V R OSNS0 CONNECT SENSE 22µF 100µF 1.0 OUT1 IIN1 LOAD0 (V) 1.8 1.0 1.6 VIN, SVIN ×5 IN– ×8 – (V) (A) (A) V AND INTVCC V OSNS0 IN1 0.9 V OUT0 1.7 I IN0 0.5 0.8 TOGETHER) V V IN0 V OUT1 OUT1 SV ADJUSTABLE IN + 0.8 1.6 0 0 VOSNS1 UP TO 25A 0 3 6 9 12 0 3 6 9 12 RUN1 LTM4678 LOAD1 100µF TIME (SEC) 4678 TA01b TIME (SEC) 4678 TA01d ON/OFF CONTROL RUN0 ×8 V – OSNS1
Output Current Readback, Varying Load Pattern Power Stage Temperature Readback
CHANNEL 1 TEMP (°C) FAULT0 25 25 60 60 FAULT INTERRUPTS FAULT1 SCL I2C/SMBus I/F WITH PMBus I SYNC COMMAND SET TO/FROM 10 OUT1 (A) 10 57 57 SDA SYNCHRONIZATION TIME-BASE IPMI OR OTHER BOARD (A) SHARE_CLK REGISTER WRITE PROTECTION ALERT MANAGEMENT CONTROLLER I OUT0 5 5 54 54 WP SGND GND 4678 TA01a 0 0 51 51 *FOR COMPLETE CIRCUIT, SEE FIGURE 46 0 3 6 9 12 CHANNEL 0 TEMP (°C) 0 3 6 9 12 TIME (SEC) 4678 TA01c TIME (SEC) 4678 TA01e Rev. A Document Feedback For more information www.analog.com 1 Document Outline Features Applications Typical Application Description Table of Contents Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Functional Diagram Test Circuits Operation Power Module Introduction Power Module Overview, Major Features EEPROM with ECC Power-Up and Initialization Soft-Start Time-Based Sequencing Voltage-Based Sequencing Shutdown Light-Load Current Operation Switching Frequency and Phase PWM Loop Compensation Output Voltage Sensing INTVCC/EXTVCC Power Output Current Sensing and Sub Milliohm DCR Current Sensing Input Current Sensing PolyPhase Load Sharing External/Internal Temperature Sense RCONFIG (Resistor Configuration) Pins VOUTn _CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Coarse Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) VTRIMn_CFG Pin Strapping Look-Up Table for the LTM4678’s Output Voltage, Fine Adjustment Setting (Not Applicable if MFR_CONFIG_ALL[6] = 1b) FSWPH_CFG Pin Strapping Look-Up Table to Set the LTM4678’s Switching Frequency and Channel Phase-Interleaving Angle (Not Applicable if MFR_CONFIG_ALL[6] = 1b) ASEL Pin Strapping Look-Up Table to Set the LTM4678’s Slave Address (Applicable Regardless of MFR_CONFIG_ALL[6] Setting) LTM4678 MFR_ADDRESS Command Examples Expressed in 7- and 8-Bit Addressing Fault Detection and Handling Status Registers and ALERT Masking Mapping Faults to FAULT Pins Power Good Pins CRC Protection Serial Interface Communication Protection Device Addressing Responses to VOUT and IIN/IOUT Faults Output Overvoltage Fault Response Output Undervoltage Response Peak Output Overcurrent Fault Response Responses to Timing Faults Responses to VIN OV Faults Responses to OT/UT Faults Internal Overtemperature Fault Response External Overtemperature and Undertemperature Fault Response Responses to Input Overcurrent and Output Undercurrent Faults Responses to External Faults Fault Logging Bus Timeout Protection Similarity Between PMBus, SMBus and I2C 2-Wire Interface PMBus Serial Digital Interface Abbreviations of Supported Data Formats Figure 7 to Figure 24 PMBus Protocols PMBus Command Summary PMBus Commands PMBus Commands Summary (Note: The Data Format Abbreviations are Detailed in Table 8) Data Format Abbreviations Applications Information VIN to VOUT Step-Down Ratios Input Capacitors Output Capacitors Light Load Current Operation Switching Frequency and Phase Recommended Switching Frequency for Various VIN-to-VOUT Step-Down Scenarios Output Current Limit Programming Minimum On-Time Considerations Variable Delay Time, Soft-Start and Output Voltage Ramping Digital Servo Mode Soft Off (Sequenced Off) Undervoltage Lockout Fault Detection and Handling Open-Drain Pins Phase-Locked Loop and Frequency Synchronization Input Current Sense Amplifier Programmable Loop Compensation Checking Transient Response PolyPhase Configuration Connecting The USB to I2C/SMBus/PMBus Controller to the LTM4678 In System LTpowerPlay: An Interactive GUI for Digital Power PMBus Communication and Command Processing Thermal Considerations and Output Current Derating Table 10 thru Table 11: Output Current Derating 0.9V Output 1.8V Output Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Output Capacitor-GRM32ER60G337ME05L, 330μF, 4V, X5R, Murata Low VOUT Range for VOUT ≤ 2.5V High VOUT Range for 2.5V ≤ VOUT ILIMIT Range = High Channel Output Voltage vs Component Selection, 0A to 12.5A/μs Load Step Low VOUT Range for VOUT ≤ 2.5V High VOUT Range for 2.5V ≤ VOUT ILIMIT Range = High Dual Phase Single Output – Ceramic and Poscap Output Capacitors Applications Information-Derating Curves EMI Performance Safety Considerations Layout Checklist/Example Typical Applications PMBus Command Details Addressing and Write Protect General Configuration Commands On/Off/Margin PWM Configuration Voltage Input Voltage and Limits Output Voltage and Limits Output Current and Limits Input Current and Limits Temperature Power Stage DCR Temperature Calibration Timing Timing—On Sequence/Ramp Timing—Off Sequence/Ramp Precondition for Restart Fault Response Fault Responses All Faults Fault Responses Input Voltage Fault Responses Output Voltage VOUT_OV_FAULT_RESPONSE Data Byte Contents VOUT_UV_FAULT_RESPONSE Data Byte Contents Fault Responses Output Current OUT_OC_FAULT_RESPONSE Data Byte Contents Fault Responses IC Temperature Data Byte Contents MFR_OT_FAULT_RESPONSE Fault Responses External Temperature Fault Sharing Fault Sharing Propagation FAULTn Propagate Fault Configuration Fault Sharing Response Scratchpad Identification Fault Warning and Status Telemetry NVM Memory Commands Store/Restore Fault Logging Fault Logging Explanation of Position_Fault Values Block Memory Write/Read Package Description LTM4678 BGA Pinout Revision History Package Photograph Design Resources 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