Datasheet ADuCM4050 (Analog Devices)

Ultra Low Power ARM Cortex-M4F MCU with Integrated Power Management Data Sheet ADuCM4050 FEATURES Digital peripherals EEMBC ULPMark™-CP score (3 V): 189 3 SPI interfaces to enable glueless interface to sensors, Ultra low power active and hibernate modes radios, and converters Active mode dynamic current: 41 µA/MHz (typical) 1 I2C and 2 UART peripheral interfaces Flexi mode: 400 µA (typical) SPORT for natively interfacing with converters and radios Hibernate mode: 0.65 µA (typical) Programmable GPIOs (44 in LFCSP and 51 in WLCSP) Shutdown mode: 50 nA (typical) 3 general-purpose timers with PWM support Shutdown mode (fast wake-up): 0.20 µA (typical) RGB timer for driving RGB LED ARM Cortex-M4F processor at 52 MHz with FPU, MPU, ITM RTC0 for time keeping with SWD interface RTC1 with SensorStrobe and time stamping Power management Programmable beeper Single-supply operation (connected to VBAT pins): 1.74 V to 27-channel DMA controller 3.6 V Clocking features Optional buck converter for improved efficiency 26 MHz clock: on-chip oscillator, external crystal oscillator, Memory options SYS_CLKIN for external clock, and integrated PLL 512 kB of embedded flash memory with ECC 32 kHz clock: on-chip oscillator and low power crystal 4 kB of cache memory to reduce active power oscillator 128 kB of configurable system SRAM with parity Clock fail detection for external crystals Safety Analog peripherals Watchdog with dedicated on-chip oscillator 12-bit SAR ADC, 1.8 MSPS, 8 channels, and digital Hardware CRC with programmable polynomial comparator Multiparity bit protected SRAM APPLICATIONS ECC protected embedded flash Internet of Things (IoT) Security Smart agriculture, smart building, smart metering, smart Hardware cryptographic accelerator supporting AES-128, city, smart machine, and sensor network AES-256, and SHA-256 Wearables Protected key storage in flash, SHA-256-based keyed Fitness and clinical HMAC and key wrap and unwrap Machine learning and neural networks User code protection TRNG FUNCTIONAL BLOCK DIAGRAM 52MHz CORE RATE PLL SERIAL WIRE HFXTAL ITM TRACE HP BUCK LFXTAL ARM CORTEX–M4F FLASH (512kB) PWR MGT HFOSC MULTI- NVIC WIC LAYER LFOSC AMBA MPU FPU BUS CRYPTO REF BUFFER MATRIX DATA SRAM/ (AES-128, AES-256, INSTRUCTION TEMP SENSOR DMA SHA 256) SRAM/ ADC KEYED HMAC CACHE (128kB) KEY WRAP–UNWRAP PROTECTED KEY STORAGE ADC CONTROLLER SPORT UART0 UART1 TMR0 TMR1 RTC0 RTC1 AHB–APB BRIDGE
001
PROGRAMMABLE SPI0 SPI1 SPIH I2C TRNG TMR2 RGB TMR WDT BEEPER GPIO CRC POLYNOMIAL
14745- Figure 1.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS OPERATING CONDITIONS AND ELECTRICAL CHARACTERISTICS EMBEDDED FLASH SPECIFICATIONS POWER SUPPLY CURRENT SPECIFICATIONS Active Mode Flexi Mode Deep Sleep Modes—VBAT = 1.8 V Deep Sleep Modes—VBAT = 3.0 V Deep Sleep Modes—VBAT = 3.6 V ADC SPECIFICATIONS TEMPERATURE SENSOR SPECIFICATIONS SYSTEM CLOCKS External Crystal Oscillator Specifications On-Chip Resistor-Capacitor (RC) Oscillator Specifications System Clocks and Phase-Locked Loop (PLL) Specifications TIMING SPECIFICATIONS Reset Timing Serial Ports Timing SPI Timing I2C Specifications General-Purpose Port Timing RTC1 (FLEX_RTC) Specifications Timer Pulse-Width Modulation (PWM) Output Cycle Timing ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARM CORTEX-M4F PROCESSOR ARM Cortex-M4F Subsystem Code Region SRAM Region System Region MEMORY ARCHITECTURE SRAM Region MMRs (Peripheral Control and Status) Flash Memory Cache Controller SYSTEM INTEGRATION FEATURES Reset Booting Power Management and Modes Active Mode Flexi Mode Hibernate Mode Shutdown Mode Shutdown Mode—Fast Wake-Up Power Management and Control Security Features Cryptographic Accelerator True Random Number Generator (TRNG) Reliability and Robustness Features ECC Enabled Flash Memory Multiparity Bit Protected SRAM Software Watchdog CRC Accelerator Programmable GPIOs Timers General-Purpose Timers Watchdog Timer (WDT) RGB Timer ADC Subsystem Clocking Clock Fail Detection Real-Time Clock (RTC) Beeper Driver Debug Capability ON-CHIP PERIPHERAL FEATURES Serial Ports (SPORT) SPI Ports UART Ports I2C DEVELOPMENT SUPPORT Documentation Hardware Software REFERENCE DESIGNS SECURITY FEATURES DISCLAIMER MCU TEST CONDITIONS DRIVER TYPES EEMBC ULPMARK™-CP SCORE GPIO MULTIPLEXING APPLICATIONS INFORMATION SILICON ANOMALY ADuCM4050 FUNCTIONALITY ISSUES FUNCTIONALITY ISSUES SECTION 1. ADuCM4050 FUNCTIONALITY ISSUES OUTLINE DIMENSIONS ORDERING GUIDE