Datasheet HMC983LP5E (Analog Devices) - 3

HerstellerAnalog Devices
BeschreibungDC - 7 GHz Fractional-N Divider and Frequency Sweeper
Seiten / Seite32 / 3 — HMC983LP5E. DC - 7 GHz FRACTIONAL-N DIVIDER. AND FREQUENCY SWEEPER. …
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HMC983LP5E. DC - 7 GHz FRACTIONAL-N DIVIDER. AND FREQUENCY SWEEPER. Figure 1. RF Input Sensitivity

HMC983LP5E DC - 7 GHz FRACTIONAL-N DIVIDER AND FREQUENCY SWEEPER Figure 1 RF Input Sensitivity

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HMC983LP5E
v02.0112
DC - 7 GHz FRACTIONAL-N DIVIDER AND FREQUENCY SWEEPER Figure 1. RF Input Sensitivity
[1]
Figure 2. Output Phase Noise, 6 GHz Input Frequency
[2] 40 -60 t Maximum Input Power Limit 100 MHz Output Frequency Frac Mode A -80 20 M ) 100 MHz Output Frequency Frac Mode B z Bm -100 s /H 0 (d Bc ER Recommended Operating Range (d -120 W -20 ISE PO O s - T N -140 PU r -40 ASE IN RF Input Signal Phase Noise F +27 C PH -160 R o +85 C -60 Minimum Input Power Limit -40 C t -180 100 MHz Output Frequency Integer Mode c -80 -200 e 0 2000 4000 6000 8000 10000 102 103 104 105 106 107 108 t RF INPUT FREQUENCY (MHz) OFFSET FREQUENCY (Hz) e
Figure 3. Output Phase Noise with 6 GHz Figure 4. Time Domain 10 MHz Output, Input in Integer Mode
[3]
6.5 GHz Input
[4] -60 5.5 s & D -80 142 MHz Output Frequency r divCkPFDp Pin Output e z) -100 /H (V) RF Input Signal Phase Noise E 5 dBc AG iD ( -120 T L ISE 100 MHz Output Frequency O VO iv N -140 T E U S O A T H 4.5 U P -160 O y D -180 50 MHz Output Frequency c divCkPFDn Pin Output Calculated Phase Noise -200 n 4 102 103 104 105 106 107 108 0 50 100 150 200 250 300 350 e OFFSET FREQUENCY (Hz) TIME (ns) u q
Figure 5. Time Domain 18 MHz Output, Figure 6. Time Domain 35 MHz Output,
e
6.5 GHz Input
[4]
6.5 GHz Input
[4] r 5.5 5.5 F divCkPFDp Pin Output divCkPFDp Pin Output (V) (V) E 5 E 5 AG AG T T L L VO VO T T PU PU T T 4.5 U 4.5 U O O divCkPFDn Pin Output divCkPFDn Pin Output 4 4 0 50 100 150 200 0 20 40 60 80 100 TIME (ns) TIME (ns) [1] the maximum and minimum levels indicate operational limits of the Dc - 7 GHz FrActionAL-n DiviDer. Performance may degrade with input power greater than 0 dBm for frequencies higher than 6500 MHz. [2] Due to Delta sigma modulation in fractional mode, the output phase noise peaks at frequency offset of fout/2 from the output. Agilent MXG n5182A used as a signal source. [3] rohde & schwarz sMBv100A used as a signal source. Inf F or o m r p atio r n ifc ur e n , d ishe e d lbiv y e A r n y a alog n D d t evic o p es is la beclie o eved rd to ebre sa: H ccur iattti e tae M nd re ilicarbloew . H a o ve C wever, o n rp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd ho e ne r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o tniltie n .c e ao t m
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license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D