High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface System Level Block Diagram To Ethernet I2C/Microwire Magnetics EEPROM (optional) Microprocessor/ Microcontroller LAN9312 To Ethernet Magnetics System Memory GPIOs/LEDs (optional) External 25MHz Crystal System Peripherals Figure 1 System Level Block Diagram Utilizing the LAN9312 Internal Block Diagram IEEE 1588 Time Stamp To Ethernet 10/100 PHY IEEE 1588 Time Stamp To Ethernet 10/100 PHY IEEE 1588 Time Stamp 10/100 MAC Host MAC Switch Fabric Host Bus Host Bus Interface Interface 10/100 MAC EEPROM Controller IEEE 1588 Clock & Events Secondary Functions (Timers,GPIOs,LEDs,IRQ) I2C (master) Microwire (master) 32-bit Host Bus I2 C / Microwire To CPU To optional EEPROM LAN9312 Figure 2 LAN9312 Internal Block Diagram Revision 2.0 (02-14-13) 4 PRODUCT PREVIEW SMSC LAN9312