Datasheet KSZ8895MLUB (Microchip) - 8

HerstellerMicrochip
BeschreibungIntegrated 5-Port 10/100 Managed Switch
Seiten / Seite100 / 8 — KSZ8895MLUB. TABLE 2-1:. SIGNALS - KSZ8895MLUB (CONTINUED). Type,. Pin. …
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KSZ8895MLUB. TABLE 2-1:. SIGNALS - KSZ8895MLUB (CONTINUED). Type,. Pin. Note. Port. Pin Function. Number. Name. 2-1

KSZ8895MLUB TABLE 2-1: SIGNALS - KSZ8895MLUB (CONTINUED) Type, Pin Note Port Pin Function Number Name 2-1

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KSZ8895MLUB TABLE 2-1: SIGNALS - KSZ8895MLUB (CONTINUED) Type, Pin Pin Note Port Pin Function Number Name 2-1
30 GNDA GND — Analog ground. 31 VDDAR P — 1.2V analog VDD. 32 NC NC — No connection. 33 NC NC — No connection. 34 GNDA GND — Analog ground. 35 NC NC — No connection. 36 NC NC — No connection. 37 VDDAT P — 3.3V analog VDD. 38 NC NC — No connection. 39 NC NC — No connection. 40 NC NC — No connection. 41 NC NC — No connection. 42 NC NC — No connection. 43 NC NC — No connection. 44 NC NC — No connection. 45 NC NC — No connection. 46 NC NC — No connection. 47 PWRDN_N IPU — Full-chip power down. Active low. 48 INTR_N OPU — Interrupt. This pin is Open-Drain output pin. 49 GNDD GND — Digital ground. 50 VDDC P — 1.2V digital core VDD. 51 PMTXEN IPD 5 Reserved for MLUB. No connect. 52 PMTXD3 IPD 5 Reserved for MLUB. No connect. 53 PMTXD2 IPD 5 Reserved for MLUB. No connect. 54 PMTXD1 IPD 5 Reserved for MLUB. No connect. 55 PMTXD0 IPD 5 Reserved for MLUB. No connect. 56 PMTXER IPD 5 Reserved for MLUB. No connect. PMTXC/ 57 I/O 5 Reserved for MLUB. No connect. PMREFCLK 58 GNDD GND — Digital ground. 59 VDDIO P — 3.3V, 2.5V, or 1.8V digital VDD for digital I/O circuitry. DS00002680A-page 8  2018 Microchip Technology Inc. Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer Transceiver 3.2 Power 3.3 Power Management 3.4 Switch Core 3.5 Advanced Functionality 3.6 MII Management (MIIM) Interface 3.7 Serial Management Interface (SMI) 4.0 Register Descriptions 4.1 Global Registers 4.2 Port Registers 4.3 Advanced Control Registers 4.4 Static MAC Address Table 4.5 VLAN Table 4.6 Dynamic MAC Address Table 4.7 Management Information Base (MIB) Counters 4.8 MIIM Registers 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings*** 6.0 Electrical Characteristics 7.0 Timing Diagrams 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MII Timing 7.4 SPI Timing 7.5 Auto-Negotiation Timing 7.6 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformer, (Note 9-1) 10.0 Package Outline Appendix A: Data Sheet Revision History The Microchip Web Site Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service