Datasheet 5P35021 (IDT)

VersaClock® Programmable Clock 5P35021 Generator Datasheet Description Features
The 5P35021 is a VersaClock programmable clock generator and ▪ Configurable OE pin function as OE, PD#, PPS or DFC control is designed for low-power, consumer, and high-performance PCI function Express applications. The 5P35021 device is a three PLL ▪ Configurable PLL bandwidth; minimizes jitter peaking architecture design, and each PLL is individual y programmable ▪ PPS: Proactive Power Saving features save power during the and allowing for up to six unique frequency outputs. end device power down mode The 5P35021 has built-in unique features such as Proactive ▪ PPB: Performance Power Balancing feature allows minimum Power Saving (PPS), Performance-Power Balancing (PPB), power consumption based on required performance Overshot Reduction Technology (ORT) and Extreme Low Power ▪ DFC: Dynamic Frequency Control feature allows user to DCO. An internal OTP memory allows the user to store the dynamically switch between and up to 4 different frequencies configuration in the device. After power up, the user can change smoothly the device register settings through the I2C interface when I2C ▪ mode is selected. Two PLLs support independent spread spectrum clocks to lower system EMI The device has programmable VCO and PLL source selection to ▪ Store user configuration into OTP memory al ow the user to do power-performance optimization based on the ▪ I2C interface application requirements. It also supports three single-ended outputs and two pair of differential outputs that support LVCMOS, ▪ Available in Automotive Grade 2 (-40°C to +105°C) or LVPECL, LVDS and LP-HCSL. A Low Power 32.768kHz clock is industrial (-40° to +85°) temperature ranges supported with only less than 2µA current consumption for system RTC reference clock.
Output Features Typical Applications
▪ 2 DIFF outputs with configurable LP-HSCL, LVDS, LVPECL, LVCMOS output pairs. 1MHz–500MHz (160MHz with LVCMOS ▪ PCIe Gen1–3 clock generator mode) ▪ Consumer application crystal replacements ▪ 1 LVCMOS outputs: 1MHz–160MHz ▪ SmartDevice, Handheld ▪ Maximum 5 LVCMOS outputs as REF + 3 × SE + 2 × DIFF_T/C ▪ as LVCMOS Computing and consumer applications ▪ ▪ Low power 32.768kHz clock supported for SE1 output Automotive applications (infotainment, dashboard, camera/vision, computing, networking)
Key Specifications
▪ PCIe clocks phase jitter: PCIe Gen3 ▪ Differential clocks < 1.5ps rms jitter integer range 12kHz– 20MHz ©2019 Integrated Device Technology, Inc. 1 October 4, 2019 Document Outline Description Typical Applications Key Specifications Features Output Features Block Diagram Pin Assignments Figure 1. Pin Assignments for 3 x 3 mm 20-VFQFPN Package – Top View Pin Descriptions Table 1. Pin Descriptions Power Group Table 2. Power Group Output Sources Table 3. Output Source Table 4. Output Source Selection Register Settings Table 5. DIFF1 Output Table 6. DIFF2 Output Device Features and Functions DFC – Dynamic Frequency Control Figure 2. DFC Function Block Diagram Table 7. DFC Function Priority DFC Function Programming PPS – Proactive Power Saving Function Figure 3. PPS Function Block Diagram Figure 4. PPS Assertion/Deassertion Timing Chart PPS Function Programming Timer Function Description Figure 5. Timer Functions OE Pin Function Table 8. OE Pin Functions Table 9. OE Pin Function Summary Table 10. PD# Priority Reference Input and Selection Crystal Input (X1/X2) Table 11. Programmable Tuning Caps Spread Spectrum Analog Spread Spectrum Digital Spread Spectrum Figure 6. Digital Spread Spectrum VBAT Table 12. VBAT Switching Threshold ORT–VCO Overshoot Reduction Technology PLL Features and Descriptions Table 13. Output 1 Divider Table 14. Output 2, 4, and 5 Divider Table 15. Output 3 Divider Output Clock Test Conditions Figure 7. LVCMOS Output Test Conditions Figure 8. LP-HCSL Output Test Conditions Absolute Maximum Ratings Table 16. Absolute Maximum Ratings Recommended Operating Conditions Table 17. Recommended Operating Conditions Electrical Characteristics Table 18. Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance Table 19. Crystal Characteristics Table 20. DC Electrical Characteristics (Industrial)1,2 Table 21. DC Electrical Characteristics (Automotive)1,2 Table 22. Input Parameters1,2 Table 23. Power Consumption of 32.768kHz Output Only Operation Table 24. DC Electrical Characteristics – 3.3V LVCMOS Table 25. DC Electrical Characteristics – 2.5V LVCMOS Table 26. DC Electrical Characteristics – 1.8V LVCMOS Table 27. Electrical Characteristics – DIF 0.7V LPHCSL Differential Outputs Table 28. Electrical Characteristics – LVDS Table 29. Electrical Characteristics – LVPECL Figure 9. Output Differential Voltage Swing AC Electrical Characteristics Table 30. AC Electrical Characteristics PCI Express Jitter Specifications Table 31. PCI Express Jitter Specifications Spread Spectrum Generation Specifications Table 32. Spread Spectrum Generation Specifications I2C Bus Characteristics Table 33. I2C Bus DC Characteristics Table 34. I2C Bus AC Characteristics I2C Mode Operations Figure 10. I2C Slave Read and Write Cycle Sequencing Glossary of Features Table 35. Glossary of Features Package Outline Drawings Marking Diagrams (industrial) Marking Diagrams (automotive) Ordering Information Revision History