Datasheet TPD7106F (Toshiba) - 6
| Hersteller | Toshiba |
| Beschreibung | Intelligent Power Device Silicon Power MOS Integrated Circuit |
| Seiten / Seite | 22 / 6 — TPD7106F. 7.3. Detection for under voltage of charge pump. Figure 7.4 … |
| Dateiformat / Größe | PDF / 637 Kb |
| Dokumentensprache | Englisch |
TPD7106F. 7.3. Detection for under voltage of charge pump. Figure 7.4 Timing chart
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TPD7106F 7.3. Detection for under voltage of charge pump
CPV terminal voltage is supervised and a charge pump voltage fall is detected. If it becomes below the charge pump fall judging voltage VCPL, a DIAG terminal will serve as L State. Output terminal OUT1 and OUT2 maintain operation. In addition, when STBY is L State, a charge pump circuit stops. STBY CPV VCPL IN1 IN2 V CPV OUT1 Hiz OUT2 Hiz DIAG Hiz Under Rapid off. Under voltage. voltage. (100μs typ.)
Figure 7.4 Timing chart.
Note: When STBY is momentarily made into L State from H State and it returns to H State again, even if CPV terminal voltage holds more than VCPL, a DIAG terminal may serve as L State. © 2 019 6 2020-01-16 Toshiba Electronic Devices & Storage Corporation
CPV terminal voltage is supervised and a charge pump voltage fall is detected. If it becomes below the charge pump fall judging voltage VCPL, a DIAG terminal will serve as L State. Output terminal OUT1 and OUT2 maintain operation. In addition, when STBY is L State, a charge pump circuit stops. STBY CPV VCPL IN1 IN2 V CPV OUT1 Hiz OUT2 Hiz DIAG Hiz Under Rapid off. Under voltage. voltage. (100μs typ.)
Figure 7.4 Timing chart.
Note: When STBY is momentarily made into L State from H State and it returns to H State again, even if CPV terminal voltage holds more than VCPL, a DIAG terminal may serve as L State. © 2 019 6 2020-01-16 Toshiba Electronic Devices & Storage Corporation