Datasheet PSMN0R9-25YLC (Nexperia) - 6
| Hersteller | Nexperia |
| Beschreibung | N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology |
| Seiten / Seite | 15 / 6 — Nexperia. PSMN0R9-25YLC. N-channel 25 V 0.99 mΩ logic level MOSFET in … |
| Revision | 02042018 |
| Dateiformat / Größe | PDF / 933 Kb |
| Dokumentensprache | Englisch |
Nexperia. PSMN0R9-25YLC. N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology. Characteristics
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Nexperia PSMN0R9-25YLC N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source breakdown ID = 250 µA; VGS = 0 V; Tj = 25 °C 25 - - V voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 22.5 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.05 1.41 1.95 V see Figure 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; - - 2.25 V see Figure 11 ID = 10 mA; VDS = VGS; Tj = 150 °C 0.5 - - V IDSS drain leakage current VDS = 25 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 25 V; VGS = 0 V; Tj = 150 °C - - 100 µA IGSS gate leakage current VGS = 16 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - - 100 nA RDSon drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 °C; - 0.95 1.25 mΩ resistance see Figure 12 VGS = 4.5 V; ID = 25 A; Tj = 150 °C; - - 2.125 mΩ see Figure 12; see Figure 13 VGS = 10 V; ID = 25 A; Tj = 25 °C; - 0.75 0.99 mΩ see Figure 12 VGS = 10 V; ID = 25 A; Tj = 150 °C; - - 1.68 mΩ see Figure 12; see Figure 13 RG internal gate resistance (AC) f = 1 MHz - 1.1 2.2 Ω
Dynamic characteristics
QG(tot) total gate charge ID = 25 A; VDS = 12 V; VGS = 10 V; - 110 - nC see Figure 14; see Figure 15 ID = 25 A; VDS = 12 V; VGS = 4.5 V; - 51 - nC see Figure 15; see Figure 14 ID = 0 A; VDS = 0 V; VGS = 10 V; - 104 - nC see Figure 14 QGS gate-source charge ID = 25 A; VDS = 12 V; VGS = 4.5 V; - 14.8 - nC see Figure 14; see Figure 15 QGS(th) pre-threshold gate-source - 10.5 - nC charge QGS(th-pl) post-threshold gate-source - 4.4 - nC charge QGD gate-drain charge - 14 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 12 V; see Figure 14; - 2.4 - V see Figure 15 Ciss input capacitance VDS = 12 V; VGS = 0 V; f = 1 MHz; - 6775 - pF Tj = 25 °C; see Figure 16 Coss output capacitance - 1437 - pF Crss reverse transfer capacitance - 573 - pF PSMN0R9-25YLC All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved
Product data sheet Rev. 2 — 4 July 2011 6 of 15
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents
Nexperia PSMN0R9-25YLC N-channel 25 V 0.99 mΩ logic level MOSFET in LFPAK using NextPower technology 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics
V(BR)DSS drain-source breakdown ID = 250 µA; VGS = 0 V; Tj = 25 °C 25 - - V voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 22.5 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; 1.05 1.41 1.95 V see Figure 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; - - 2.25 V see Figure 11 ID = 10 mA; VDS = VGS; Tj = 150 °C 0.5 - - V IDSS drain leakage current VDS = 25 V; VGS = 0 V; Tj = 25 °C - - 1 µA VDS = 25 V; VGS = 0 V; Tj = 150 °C - - 100 µA IGSS gate leakage current VGS = 16 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -16 V; VDS = 0 V; Tj = 25 °C - - 100 nA RDSon drain-source on-state VGS = 4.5 V; ID = 25 A; Tj = 25 °C; - 0.95 1.25 mΩ resistance see Figure 12 VGS = 4.5 V; ID = 25 A; Tj = 150 °C; - - 2.125 mΩ see Figure 12; see Figure 13 VGS = 10 V; ID = 25 A; Tj = 25 °C; - 0.75 0.99 mΩ see Figure 12 VGS = 10 V; ID = 25 A; Tj = 150 °C; - - 1.68 mΩ see Figure 12; see Figure 13 RG internal gate resistance (AC) f = 1 MHz - 1.1 2.2 Ω
Dynamic characteristics
QG(tot) total gate charge ID = 25 A; VDS = 12 V; VGS = 10 V; - 110 - nC see Figure 14; see Figure 15 ID = 25 A; VDS = 12 V; VGS = 4.5 V; - 51 - nC see Figure 15; see Figure 14 ID = 0 A; VDS = 0 V; VGS = 10 V; - 104 - nC see Figure 14 QGS gate-source charge ID = 25 A; VDS = 12 V; VGS = 4.5 V; - 14.8 - nC see Figure 14; see Figure 15 QGS(th) pre-threshold gate-source - 10.5 - nC charge QGS(th-pl) post-threshold gate-source - 4.4 - nC charge QGD gate-drain charge - 14 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 12 V; see Figure 14; - 2.4 - V see Figure 15 Ciss input capacitance VDS = 12 V; VGS = 0 V; f = 1 MHz; - 6775 - pF Tj = 25 °C; see Figure 16 Coss output capacitance - 1437 - pF Crss reverse transfer capacitance - 573 - pF PSMN0R9-25YLC All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2017. All rights reserved
Product data sheet Rev. 2 — 4 July 2011 6 of 15
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 1.4 Quick reference data 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Package outline 8. Revision history 9. Legal information 9.1 Data sheet status 9.2 Definitions 9.3 Disclaimers 9.4 Trademarks 10. Contact information 11. Contents