Datasheet 1EDN7550U (Infineon) - 10

HerstellerInfineon
BeschreibungSingle-channel EiceDRIVER gate-drive IC with true differential inputs
Seiten / Seite27 / 10 — EiceDRIVER™ 1EDN7550 and 1EDN8550. Single-channel EiceDRIVER™ gate-drive …
Revision02_02
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EiceDRIVER™ 1EDN7550 and 1EDN8550. Single-channel EiceDRIVER™ gate-drive IC with true differential inputs

EiceDRIVER™ 1EDN7550 and 1EDN8550 Single-channel EiceDRIVER™ gate-drive IC with true differential inputs

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EiceDRIVER™ 1EDN7550 and 1EDN8550 Single-channel EiceDRIVER™ gate-drive IC with true differential inputs Electrical characteristics and parameters Table 11 Inputs IN+, IN- Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
Differential input voltage ∆VRinH – 1.7 – V Independent of VDD threshold for transition LH (at Rin1/Rin2 = 33 kΩ
13)
input resistor) Differential input voltage ∆VRinL – 1.5 – V Independent of VDD threshold for transition HL (at Rin1/Rin2 = 33 kΩ
13)
input resistor) Total input resistance on each Rin1 / Rin2 – 36 – kΩ Rin1/Rin2 = 33 kΩ
13)
leg
Table 12 Static Output Characteristics Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
High-level (sourcing) output Ron_SRC – 0.85 – Ω ISRC = 50 mA resistance Sourcing output current ISRC_pk – 4.0
14)
A – Low-level (sinking) output Ron_SNK – 0.35 – Ω ISNK = 50 mA resistance Sinking output current ISNK_pk – -8.0
15)
A –
Table 13 Dynamic characteristics Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
Input-to-output propagation tPDon 38 45 55 ns CL = 200 pF delay turn-on Input-to-output propagation tPDoff 38 45 55 ns CL = 200 pF delay turn-off Rise time trise — 6.5 15
16)
ns CL = 1.8 nF Fall time tfall — 4.5 15
16)
ns CL = 1.8 nF Rise time trise — 1 5
16)
ns CL = 200 pF Fall Time tfall — 1 5
16)
ns CL = 200 pF Minimum input pulse width tPW — 25
16)
— ns CL = 1.8 nF that changes output state For an illustration of the dynamic characteristics see
Figure 6
and
Figure 7 Figure 5
gives the circuit used for parameter testing 13 See
Figure 1
14 Actively limited to approx. 5.2 Apk; not subject to production test - verified by design / characterization 15 Actively limited to approx. -10.4 Apk; not subject to production test - verified by design / characterization 16 Parameter verified by design, not 100% tested in production Datasheet 10 Rev. 2.2 2019-12-09 Document Outline Features Description Table of contents 1 Pin configuration and description 2 Block diagram 3 Functional description 3.1 Differential input 3.1.1 Common mode input range 3.2 Driver outputs 3.3 Supply voltage and Undervoltage Lockout (UVLO) 4 Electrical characteristics and parameters 4.1 Absolute maximum ratings 4.2 Thermal characteristics 4.3 Operating range 4.4 Electrical characteristics 4.5 Timing diagram 5 Typical characteristics 6 Typical applications 6.1 Switches with Kelvin source connection (4-pin packages) 6.2 Applications with significant parasitic PCB-inductances 6.3 Switches with bipolar gate drive 6.4 High-side switches 7 Layout guidelines 8 Package information 8.1 PG-SOT23-6 package 8.2 PG-TSNP-6 package 9 Device numbers and markings Revision history Disclaimer