Datasheet 1EDN7550U (Infineon) - 8
| Hersteller | Infineon |
| Beschreibung | Single-channel EiceDRIVER gate-drive IC with true differential inputs |
| Seiten / Seite | 27 / 8 — EiceDRIVER™ 1EDN7550 and 1EDN8550. Single-channel EiceDRIVER™ gate-drive … |
| Revision | 02_02 |
| Dateiformat / Größe | PDF / 1.1 Mb |
| Dokumentensprache | Englisch |
EiceDRIVER™ 1EDN7550 and 1EDN8550. Single-channel EiceDRIVER™ gate-drive IC with true differential inputs
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EiceDRIVER™ 1EDN7550 and 1EDN8550 Single-channel EiceDRIVER™ gate-drive IC with true differential inputs Electrical characteristics and parameters 4.2 Thermal characteristics Table 5 Thermal characteristics SOT23 package Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
Thermal resistance junction- RthJA25 – 165.1 – K/W – ambient
7)
Thermal resistance junction- RthJC25 – 79.9 – K/W – case (top)
8)
Thermal resistance junction- RthJB25 – 65.2 – K/W – board
9)
Characterization parameter ΨthJC25 – 14 – K/W – junction-case (top)
10)
Characterization parameter ΨthJB25 – 51 – K/W – junction-board
11) Table 6 Thermal characteristics TSNP package Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
Thermal resistance junction- RthJA25 – 141 – K/W – ambient
7)
Thermal resistance junction- RthJC25 – 81 – K/W – case (top)
8)
Thermal resistance junction- RthJB25 – 36 – K/W – board
9)
Characterization parameter ΨthJC25 – 80 – K/W – junction-case (top)
10)
Characterization parameter ΨthJB25 – 36 – K/W – junction-board
11)
7 Obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a 8 Obtained by simulating a cold plate test on the package top. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88 9 Obtained by simulation in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8 10 Estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining Rth, using a procedure described in JESD51-2a (sections 6 and 7) 11 Estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining Rth, using a procedure described in JESD51-2a (sections 6 and 7) Datasheet 8 Rev. 2.2 2019-12-09 Document Outline Features Description Table of contents 1 Pin configuration and description 2 Block diagram 3 Functional description 3.1 Differential input 3.1.1 Common mode input range 3.2 Driver outputs 3.3 Supply voltage and Undervoltage Lockout (UVLO) 4 Electrical characteristics and parameters 4.1 Absolute maximum ratings 4.2 Thermal characteristics 4.3 Operating range 4.4 Electrical characteristics 4.5 Timing diagram 5 Typical characteristics 6 Typical applications 6.1 Switches with Kelvin source connection (4-pin packages) 6.2 Applications with significant parasitic PCB-inductances 6.3 Switches with bipolar gate drive 6.4 High-side switches 7 Layout guidelines 8 Package information 8.1 PG-SOT23-6 package 8.2 PG-TSNP-6 package 9 Device numbers and markings Revision history Disclaimer
EiceDRIVER™ 1EDN7550 and 1EDN8550 Single-channel EiceDRIVER™ gate-drive IC with true differential inputs Electrical characteristics and parameters 4.2 Thermal characteristics Table 5 Thermal characteristics SOT23 package Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
Thermal resistance junction- RthJA25 – 165.1 – K/W – ambient
7)
Thermal resistance junction- RthJC25 – 79.9 – K/W – case (top)
8)
Thermal resistance junction- RthJB25 – 65.2 – K/W – board
9)
Characterization parameter ΨthJC25 – 14 – K/W – junction-case (top)
10)
Characterization parameter ΨthJB25 – 51 – K/W – junction-board
11) Table 6 Thermal characteristics TSNP package Parameter Symbol Values Unit Note or Test Condition Min. Typ. Max.
Thermal resistance junction- RthJA25 – 141 – K/W – ambient
7)
Thermal resistance junction- RthJC25 – 81 – K/W – case (top)
8)
Thermal resistance junction- RthJB25 – 36 – K/W – board
9)
Characterization parameter ΨthJC25 – 80 – K/W – junction-case (top)
10)
Characterization parameter ΨthJB25 – 36 – K/W – junction-board
11)
7 Obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a 8 Obtained by simulating a cold plate test on the package top. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88 9 Obtained by simulation in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8 10 Estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining Rth, using a procedure described in JESD51-2a (sections 6 and 7) 11 Estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining Rth, using a procedure described in JESD51-2a (sections 6 and 7) Datasheet 8 Rev. 2.2 2019-12-09 Document Outline Features Description Table of contents 1 Pin configuration and description 2 Block diagram 3 Functional description 3.1 Differential input 3.1.1 Common mode input range 3.2 Driver outputs 3.3 Supply voltage and Undervoltage Lockout (UVLO) 4 Electrical characteristics and parameters 4.1 Absolute maximum ratings 4.2 Thermal characteristics 4.3 Operating range 4.4 Electrical characteristics 4.5 Timing diagram 5 Typical characteristics 6 Typical applications 6.1 Switches with Kelvin source connection (4-pin packages) 6.2 Applications with significant parasitic PCB-inductances 6.3 Switches with bipolar gate drive 6.4 High-side switches 7 Layout guidelines 8 Package information 8.1 PG-SOT23-6 package 8.2 PG-TSNP-6 package 9 Device numbers and markings Revision history Disclaimer