I IX4351NE NTEGRATED CIRCUITS DIVISION 4.4 Negative VSS Charge Pump Regulator Threshold Voltage (VTH,INSOFT), typically 2.6V, OUTSNK turns on and quickly pulls the GATE to V The IX4351NE has an inverting charge pump SS. regulator that produces a negative regulated V This two-step turn-off avoids dangerous dV/dt SS over-voltages across the external SiC MOSFET or output. The charge pump operates in a closed-loop IGBT. mode creating VSS from VDD. Charge pump output regulation is achieved by sensing the VSS voltage The DESAT comparator is disabled for a fixed blanking through resistor divider R1 and R2. The charge pump time (tBLANK) to avoid detecting a false desaturation requires an external flying capacitor (CFLY), two event during the external SiC MOSFET or IGBT discrete Schottky diodes, a storage capacitor (CSS), turn-on. The nominal tBLANK is 250ns, which can be and a peak current limiting resistor (RFLY). VSS is set increased by adjusting RDESAT and CBLANK. This by the R1 and R2 resistor divider: blanking time starts when IN transitions from low to high. R2 V = –V --- SS VREG R1 4.6 Thermal Shutdown4.5 Desaturation Detection and Protection Thermal protection circuity turns off OUTSRC and turns on OUTSNK and OUTSOFT when the The desaturation protection circuit ensures the IX4351NE internal junction temperature reaches a protection of the external SiC MOSFET or IGBT in the nominal +160°C. OUTSRC is re-enabled when the event of an over-current situation. The DESAT pin internal junction temperature cools to approximately monitors the drain voltage of the power SiC MOSFET +140°C. or the collector of the power IGBT via RDESAT and D1. If the drain or collector voltage exceeds the DESAT 4.7 FAULT Output Threshold Voltage (VTH,DESAT), typically 6.8V, a The FAULT output signals whenever the IX4351NE is controlled turn-off sequence is initiated. OUTSRC is undergoing a fault condition. The open-drain NMOS is turned off and OUTSOFT is turned on. The 900mA pulled low when V sink capability of OUTSOFT allows an initial slow DD < VDDUV+, TJ>TSD, or desaturation is detected. FAULT is deactivated when turn-off of the external SiC MOSFET or IGBT. When the fault condition is remedied. the GATE voltage decreases to the Soft Shutdown Figure 2. Timing Diagram IN GND VDD OUTSRC Hi-Z Hi-Z OUTSNK VSS Hi-Z OUTSOFT V V TH,INSOFT SS DESAT VTH,DESAT Hi-Z FAULT GND t t t On Off BLANK tOUTSOFTDLY 10 www.ixysic.com R02 Document Outline Features Applications Description Ordering Information 1 Specifications 1.1 Package Pinout 1.2 Pin Description 1.3 Absolute Maximum Ratings 1.4 Recommended Operating Conditions 1.5 Electrical Characteristics 1.6 Thermal Characteristics 2 Performance Data 3 Performance Data (Cont.) 4 Functional Description 4.1 Logic Input (IN) 4.2 Gate Drive Outputs (OUTSRC and OUTSNK) 4.3 Internal 4.6V Regulator (VREG) 4.4 Negative VSS Charge Pump Regulator 4.5 Desaturation Detection and Protection 4.6 Thermal Shutdown 4.7 FAULT Output 5 Manufacturing Information 5.1 Moisture Sensitivity 5.2 ESD Sensitivity 5.3 Soldering Profile 5.4 Board Wash 5.5 Mechanical Dimensions