Datasheet TLP5231 (Toshiba) - 9

TLP5231 11. Switching Characteristics 11.1. Switching Characteristics (Note) (Unless otherwise specified, Ta = -40 to 110 , VCC2 - VE = 15 V, VE - VEE = 8 V) Characteristics Symbol Note Test Circuit Test Condition Min Typ. Max Unit Propagation delay time tpLH (Note 1) Fig.13.1.17 IF = 8→0 mA, CP = CN = 4 nF, 100 200 300 ns (L/H) f = 20 kHz, duty = 50 % Propagation delay time tpHL IF = 0→8 mA, CP = CN = 4 nF, 100 200 300 (H/L) f = 20 kHz, duty = 50 % Pulse width distortion |tpHL- IF = 0←→8 mA,   150 tpLH| CP = CN = 4 nF, Propagation delay skew t f = 20 kHz, duty = 50 % psk (Note 1), -200  200 (device to device) (Note 2) VOUTP rise time at LED- tDP (Note 1) IF = 8→0 mA, CP = CN = 4 nF, 50 150 250 OFF (90 %) f = 20 kHz, duty = 50 % VOUTN fall time at LED- tDN IF = 0→8 mA, CP = CN = 4 nF, 50 150 250 ON (10%) f = 20 kHz, duty = 50 % Outputs non-overlap time tNLH IF = 8→0 mA, CP = CN = 4 nF,  60  (L/H) f = 20 kHz, duty = 50 % Outputs non-overlap time tNHL IF = 0→8 mA, CP = CN = 4 nF,  50  (H/L) f = 20 kHz, duty = 50 % Rise time of VOUTP tPR IF = 8→0 mA, CP = CN = 4 nF,  50  f = 20 kHz, duty = 50 % Fall time of VOUTP tPF IF = 0→8 mA, CP = CN = 4 nF,  50  f = 20 kHz, duty = 50 % Rise time of VOUTN tNR IF = 8→0 mA, CP = CN = 4 nF,  50  f = 20 kHz, duty = 50 % Fall time of VOUTN tNF IF = 0→8 mA, CP = CN = 4 nF,  40  f = 20 kHz, duty = 50 % Note: All typical values are at Ta = 25 . CP and CN mean the gate capacitance of an external MOSFET buffer. Note 1: Input signal duty = 50 %, tr = tf = 5 ns or less Note 2: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH that will be seen between units at the same given conditions (supply voltage, input current, temperature, etc). ©2019-2020 9 2020-03-02 Toshiba Electronic Devices & Storage Corporation Rev.2.0