Datasheet LTM4691 (Analog Devices) - 9

link to page 10 LTM4691
OPERATION
The LTM4691 is a dual standalone non-isolated switching The RUN pins have precision 400mV threshold with 50mV mode DC/DC power supply. Each channel can deliver up to hysteresis. It can be used to provide event-based power 2A of DC output current with few external input and out- up sequencing by connecting the RUN pin to the output put capacitors. This module provides precisely regulated of another buck through a resistor divider. If the RUN pin output voltage programmable via external resistor divider of a buck is low, that buck is shut down and in a low qui- from 0.5V to 3.6V over 2.5V to 3.6V input voltage range. escent current state. If both RUN pins are low, both bucks The typical application schematic is shown on page 1. are in shutdown, the SW pins are high impedance, and The LTM4691 integrates two constant frequency peak the quiescent current of the LTM4691 is less than 1μA. current mode regulators, power MOSFETs, inductors, If either pin is above the enable threshold of 400mV, its and other supporting discrete components. The typical respective buck is enabled. switching frequency of the LTM4691 is 2MHz, it can be Al buck regulators have forward and reverse-current lim- externally synchronized to a clock from 1MHz to 3MHz. iting, soft-start to limit inrush current during start-up, and See the Applications Information section. short-circuit protection. When both bucks are disabled With current mode control and internal feedback loop and either back is enabled, there is a 400μs (typical) delay compensation, the LTM4691 module has sufficient sta- while internal circuitry powers up followed by a 100μs bility margins and good transient performance with mini- (typical) no start-time before switching commences and mum output capacitors. Current mode control provides the soft-start ramp begins. If a second buck is enabled, it cycle-by-cycle fast current limiting. Peak current limit- will also have a 100μs (typical) no start-time. If the second ing is provided in an over-current condition. Each buck buck is enabled within 400μs of the first buck, it will wait switching regulator has its own internal PGOOD signal. until the expiry of the 400μs to begin its no start-time. If either enabled buck’s internal PGOOD signal stays low The buck switching regulators are 180° out of phase with for greater than 120µs, then the PGOOD pin is pulled respect to each other. The phase determines the fixed low indicating to a microprocessor that a power fault has edge of the switching sequence, which is when the inter- occurred. nal top PMOS turns on. The PMOS off (NMOS on) phase is subject to the duty cycle demanded by the regulator. Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information VIN to VOUT Step-Down Ratios Output Voltage Programming Input Decoupling Capacitors Output Decoupling Capacitors Mode Selection Operating Frequency and External Synchronization Power GOOD Output Overvoltage Protection Output Voltage Soft-Start Dropout Operation Output Short-Circuit Protection and Recovery Load Sharing Using the Precision RUN Threshold Thermal Considerations and Output Current Derating Safety Considerations Layout Checklist/Example Applications Information Typical Applications Pin Configuration Table LTM4691 Component LGA Pinout Package Description Package Photo Related Parts