Datasheet LT3756, LT3756-1, LT3756-2 (Analog Devices) - 9

HerstellerAnalog Devices
Beschreibung100VIN, 100VOUT LED Controller
Seiten / Seite26 / 9 — PIN FUNCTIONS CTRL (Pin 6/Pin 16):. RT (Pin 11/Pin 5):. SHDN/UVLO (Pin …
RevisionC
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DokumentenspracheEnglisch

PIN FUNCTIONS CTRL (Pin 6/Pin 16):. RT (Pin 11/Pin 5):. SHDN/UVLO (Pin 12/Pin 6):. VREF (Pin 7/Pin 1):. PWM (Pin 8/Pin 2):

PIN FUNCTIONS CTRL (Pin 6/Pin 16): RT (Pin 11/Pin 5): SHDN/UVLO (Pin 12/Pin 6): VREF (Pin 7/Pin 1): PWM (Pin 8/Pin 2):

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LT3756/LT3756-1/LT3756-2
PIN FUNCTIONS CTRL (Pin 6/Pin 16):
Current Sense Threshold Adjustment by an undervoltage condition (detected by SHDN/UVLO Pin. Regulating threshold V(ISP – ISN) is 1/10th VCTRL plus pin) or thermal limit. an offset for 0V < VCTRL < 1V. For VCTRL > 1.2V the current
RT (Pin 11/Pin 5):
Switching Frequency Adjustment Pin. sense threshold is constant at the full-scale value of 100mV. Set the frequency using a resistor to GND (for resistor For 1V < VCTRL < 1.2V, the dependence of current sense values, see the Typical Performance curve or Table 1). threshold upon VCTRL transitions from a linear function Do not leave the RT pin open. to a constant value, reaching 98% of full-scale value by V
SHDN/UVLO (Pin 12/Pin 6):
Shutdown and Undervoltage CTRL = 1.1V. Do not leave this pin open. Detect Pin. An accurate 1.22V falling threshold with ex-
VREF (Pin 7/Pin 1):
Voltage Reference Output Pin, Typically ternally programmable hysteresis detects when power is 2V. This pin drives a resistor divider for the CTRL pin, either OK to enable switching. Rising hysteresis is generated for analog dimming or for temperature limit/compensation by the external resistor divider and an accurate internal of LED load. Can supply up to 100μA. 2.1µA pull-down current. Above the threshold (but below
PWM (Pin 8/Pin 2):
A signal low turns off switcher, idles 6V), SHDN/UVLO input bias current is sub-µA. Below the oscillator and disconnects VC pin from all internal loads. falling threshold, a 2.1µA pull-down current is enabled so PWMOUT pin follows PWM pin. PWM has an internal the user can define the hysteresis with the external resis- pull-down resistor. If not used, connect to INTVCC. tor selection. An undervoltage condition resets soft-start.
OPENLED (Pin 9/Pin 3, LT3756 and LT3756-2):
An open- Tie to 0.4V, or less, to disable the device and reduce VIN collector pull-down on OPENLED asserts if the FB input quiescent current below 1µA. is greater than the FB regulation threshold minus 50mV
INTVCC (Pin 13/Pin 7):
Regulated Supply for Internal (typical). To function, the pin requires an external pull-up Loads, GATE Driver and PWMOUT Driver. Supplied from current less than 1mA. When the PWM input is low and VIN and regulates to 7.15V (typical). INTVCC must be the DC/DC converter is idle, the OPENLED condition is bypassed with a 4.7µF capacitor placed close to the pin. latched to the last valid state when the PWM input was Connect INTVCC directly to VIN if VIN is always less than high. When PWM input goes high again, the OPENLED or equal to 8V. pin will be updated. This pin may be used to report an open LED fault.
VIN (Pin 14/Pin 8):
Input Supply Pin. Must be locally bypassed with a 0.22µF (or larger) capacitor placed close
SYNC (Pin 9/Pin 3, LT3756-1 Only):
The SYNC pin is used to the IC. to synchronize the internal oscillator to an external logic level signal. The R
SENSE (Pin 15/Pin 9):
The current sense input for the T resistor should be chosen to program an internal switching frequency 20% slower than the SYNC control loop. Kelvin connect this pin to the positive ter- pulse frequency. Gate turn-on occurs a fixed delay after minal of the switch current sense resistor, RSENSE, in the the rising edge of SYNC. For best PWM performance, the source of the NFET. The negative terminal of the current PWM rising edge should occur at least 200ns before the sense resistor should be connected to the GND plane SYNC rising edge. Use a 50% duty cycle waveform to drive close to the IC. this pin. This pin replaces OPENLED on LT3756-1 option
GATE (Pin 16/Pin 10):
N-channel FET Gate Driver Output. parts. If not used, tie this pin to GND. Switches between INTVCC and GND. Driven to GND during
SS (Pin 10/Pin 4):
Soft-Start Pin. This pin modulates shutdown, fault or idle states. oscillator frequency and compensation pin voltage (VC)
GND (Pin 17/Pin 17):
Ground. This pin also serves as clamp. The soft-start interval is set with an external capaci- current sense input for control loop, sensing negative tor. The pin has a 10µA (typical) pull-up current source terminal of current sense resistor. Solder the exposed pad to an internal 2.5V rail. The soft-start pin is reset to GND directly to ground plane. Rev. C For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts