Datasheet LT3763 (Analog Devices) - 10

HerstellerAnalog Devices
Beschreibung60V High Current Step-Down LED Driver Controller
Seiten / Seite30 / 10 — PIN FUNCTIONS. BG (Pin 1):. IVINP (Pin 7):. IVINMON (Pin 8):. INTVCC (Pin …
RevisionC
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DokumentenspracheEnglisch

PIN FUNCTIONS. BG (Pin 1):. IVINP (Pin 7):. IVINMON (Pin 8):. INTVCC (Pin 2):. FAULT (Pin 9):. VIN (Pin 3):. EN/UVLO (Pin 4):

PIN FUNCTIONS BG (Pin 1): IVINP (Pin 7): IVINMON (Pin 8): INTVCC (Pin 2): FAULT (Pin 9): VIN (Pin 3): EN/UVLO (Pin 4):

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LT3763
PIN FUNCTIONS BG (Pin 1):
BG is the bottom FET gate drive signal that
IVINP (Pin 7):
IVINP is the noninverting input of the input controls the state of the external low side power FET. The current sense amplifier. This pin connects to the input driver pull-up impedance is 2.2Ω, and pull-down imped- supply VIN and the input current sense resistor. ance is 1Ω. Do not force any voltage on this pin.
IVINMON (Pin 8):
IVINMON is the buffered output of the
INTVCC (Pin 2):
The INTVCC pin provides a regulated 5V input current sense amplifier. This pin enables monitoring output for charging the BOOST capacitor. INTVCC also pro- of the averaged supply current with an output voltage of vides the power for the digital and switching subcircuits. 20 • (VIVINP – VIVINN). The capacitive loading to this pin Do not force any voltage on this pin. Bypass with at least should be less than 1nF. a 22µF capacitor to ground. INTVCC is current-limited to
FAULT (Pin 9):
Output Voltage Fault Detection Pin for 50mA. Shutdown operation disables the output voltage Shorted or Open LEDs. Internal comparators pull down drive. this pin when the FB pin voltage is lower than 0.25V or
VIN (Pin 3):
Input Supply Pin. Must be locally bypassed higher than 1.16V and when the inductor current is less with at least a 4.7µF low ESR capacitor to ground as close than ten percent of the maximum value. This pin should as possible to the exposed pad of the package. be pulled up to INTVCC with a resistance higher than 10k.
EN/UVLO (Pin 4):
Enable Pin. The EN/UVLO pin acts as
FBIN (Pin 10):
The FBIN pin enables peak power tracking an enable pin and turns on the internal current bias core for solar powered chargers and other similar applications and sub-regulators at 1.705V and turns off at 1.52V. The by controlling the output current of the system based on pin does not have any pull-up or pull-down, requiring a the input voltage. This pin should be tied to VREF if this voltage bias for normal operation. Full shutdown occurs feature is not used. at approximately 0.5V. If unused, the Enable pin may be
FB (Pin 11):
The feedback pin is used for voltage regula- tied to VIN. tion and overvoltage protection. The feedback voltage is
VREF (Pin 5):
Buffered 2V Reference Capable of 0.5mA regulated to 1.206V. When the feedback voltage exceeds Drive. Bypass with at least 1µF capacitor to ground. 1.515V, the overvoltage lockout prevents switching.
IVINN (Pin 6):
IVINN is the inverting input of the input current sense amplifier. This pin connects to the drain of the high side N-channel power FET and the input current sense resistor. Rev. C 10 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Electrical Characteristics Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts