Datasheet ADT7516, ADT7517, ADT7519 (Analog Devices) - 5

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ADT7516/ADT7517/ADT7519 Parameter1 Min Typ Max Unit Conditions/Comments
ON-CHIP REFERENCE Reference Voltage4 2.2662 2.28 2.2938 V Temperature Coefficient4 80 ppm/°C OUTPUT CHARACTERISTICS4 Output Voltage6 0.001 VDD − 0.1 V This is a measure of the minimum and maximum drive capability of the output amplifier DC Output Impedance 0.5 Ω Short Circuit Current 25 mA VDD = 5 V 16 mA VDD = 3 V Power-Up Time 2.5 μs Coming out of power-down mode, VDD = 5 V 5 μs Coming out of power-down mode, VDD = 3.3 V DIGITAL INPUTS4 Input Current ±1 μA VIN = 0 V to VDD VIL, Input Low Voltage 0.8 V VIH, Input High Voltage 1.89 V Pin Capacitance 3 10 pF All digital inputs SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than 50 ns LDAC Pulse Width 20 ns Edge triggered input DIGITAL OUTPUT Digital High Voltage, VOH 2.4 V ISOURCE = ISINK = 200 μA Output Low Voltage, VOL 0.4 V IOL = 3 mA Output High Current, IOH 1 mA VOH = 5 V Output Capacitance, COUT 50 pF INT/INT Output Saturation Voltage 0.8 V IOUT = 4 mA I2C TIMING CHARACTERISTICS7, 8 Serial Clock Period, t1 2.5 μs Fast mode I2C, see Figure 2 Data In Setup Time to SCL High, t2 50 ns Data Out Stable after SCL Low, t3 0 ns See Figure 2 SDA Low Setup Time to SCL 50 ns See Figure 2 Low (Start Condition), t4 SDA High Hold Time after SCL 50 ns See Figure 2 High (Stop Condition), t5 SDA and SCL Fall Time, t6 300 ns See Figure 2 SDA and SCL Rise Time, t7 3009 ns See Figure 2 SPI TIMING CHARACTERISTICS4, 10 CS to SCLK Setup Time, t1 0 ns See Figure 3 SCLK High Pulse Width, t2 50 ns See Figure 3 SCLK Low Pulse Width, t3 50 ns See Figure 3 Data Access Time after SCLK 35 ns Falling Edge, t 11 4 Data Setup Time Prior to SCLK 20 ns See Figure 3 Rising Edge, t5 Data Hold Time after SCLK 0 ns See Figure 3 Rising Edge, t6 CS to SCLK Hold Time, t7 0 μs See Figure 3 CS to DOUT High Impedance, t8 40 ns See Figure 3 POWER REQUIREMENTS VDD 2.7 5.5 V VDD Settling Time 50 ms VDD settles to within 10% of its final voltage level IDD (Normal Mode)12 3 mA VDD = 3.3 V, VIH = VDD, and VIL = GND 2.2 3 mA VDD = 5 V, VIH = VDD, and VIL = GND Rev. B | Page 5 of 44 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DAC AC CHARACTERISTICS TIMING DIAGRAMS FUNCTIONAL BLOCK DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION POWER-UP CALIBRATION CONVERSION SPEED FUNCTION DESCRIPTION—VOLTAGE OUTPUT Digital-to-Analog Converters Digital-to-Analog Section Resistor String DAC Reference Inputs Output Amplifier Thermal Voltage Output FUNCTIONAL DESCRIPTION—ANALOG INPUTS Single-Ended Inputs Converter Operation ADC TRANSFER FUNCTION Analog Input ESD Protection AIN Interrupts FUNCTIONAL DESCRIPTION—MEASUREMENT Temperature Sensor VDD Monitoring On-Chip Reference Round Robin Measurement Single Channel Measurement Temperature Measurement Method Layout Considerations Interrupts ADT7516/ADT7517/ADT7519 REGISTERS Interrupt Status 1 Register (Read-Only) [Address 0x00] Interrupt Status 2 Register (Read-Only) [Address = 0x01] Internal Temperature Value/VDD Value Register LSBs (Read-Only) [Address = 0x03] External Temperature Value and Analog Input 1 to Analog Input 4 Register LSBs (Read-Only) [Address = 0x04] VDD Value Register MSBs (Read-Only) [Address = 0x06] Internal Temperature Value Register MSBs (Read-Only) [Address = 0x07] External Temperature Value or Analog Input AIN1 Register MSBs (Read-Only) [Address = 0x08] AIN2 Register MSBs (Read) [Address = 0x09] AIN3 Register MSBs (Read) [Address = 0x0A] AIN4 Register MSBs (Read) [Address = 0x0B] DAC A Register LSBs (Read/Write) [Address = 0x10] DAC A Register MSBs (Read/Write) [Address = 0x11] DAC B Register LSBs (Read/Write) [Address = 0x12] DAC B Register MSBs (Read/Write) [Address = 0x13] DAC C Register LSBs (Read/Write) [Address = 0x14] DAC C Register MSBs (Read/Write) [Address = 0x15] DAC D Register LSBs (Read/Write) [Address = 0x16] DAC D Register MSBs (Read/Write) [Address = 0x17] Control Configuration 1 Register (Read/Write) [Address = 0x18] Control Configuration 2 Register (Read/Write) [Address = 0x19] Control Configuration 3 Register (Read/Write) [Address = 0x1A] DAC Configuration Register (Read/Write) [Address = 0x1B] LDAC Configuration Register (Write-Only)[Address = 0x1C] Interrupt Mask 1 Register (Read/Write) [Address = 0x1D] Interrupt Mask 2 Register (Read/Write) [Address = 0x1E] Internal Temperature Offset Register (Read/Write) [Address = 0x1F] External Temperature Offset Register (Read/Write) [Address = 0x20] Internal Analog Temperature Offset Register (Read/Write) [Address = 0x21] External Analog Temperature Offset Register (Read/Write) [Address = 0x22] VDD VHIGH Limit Register (Read/Write) [Address = 0x23] VDD VLOW Limit Register (Read/Write) [Address = 0x24] Internal THIGH Limit Register (Read/Write) [Address = 0x25] Internal TLOW Limit Register (Read/Write) [Address = 0x26] External THIGH/AIN1 VHIGH Limit Register (Read/Write) [Address = 0x27] External TLOW/AIN1 VLOW Limit Register (Read/Write) [Address = 0x28] AIN2 VHIGH Limit Register (Read/Write) [Address = 0x2B] AIN2 VLOW Limit Register (Read/Write) [Address = 0x2C] AIN3 VHIGH Limit Register (Read/Write) [Address = 0x2D] AIN3 VLOW Limit Register (Read/Write) [Address = 0x2E] AIN4 VHIGH Limit Register (Read/Write) [Address = 0x2F] AIN4 VLOW Limit Register (Read/Write) [Address = 0x30] Device ID Register (Read-Only) [Address = 0x4D] Manufacturer’s ID Register (Read-Only) [Address = 0x4E] Silicon Revision Register (Read-Only) [Address = 0x4F] SPI Lock Status Register (Read-Only) [Address = 0x7F] SERIAL INTERFACE Serial Interface Selection I2C Serial Interface Writing to the ADT7516/ADT7517/ADT7519 Writing to the Address Pointer Register for a Subsequent Read Writing Data to a Register Reading Data from the ADT7516/ADT7517/ADT7519 SPI Serial Interface Write Operation Read Operation SMBus/SPI INT/ SMBUS ALERT RESPONSE OUTLINE DIMENSIONS ORDERING GUIDE