Datasheet LTM8024 (Analog Devices) - 9

HerstellerAnalog Devices
Beschreibung40VIN, Dual 3.5A or Single 7A Silent Switcher μModule Regulator
Seiten / Seite24 / 9 — PIN FUNCTIONS VIN1 (Bank 1):. VIN2 (Bank 2):. AUX1/AUX2 (Pins B4, B3):. …
RevisionA
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DokumentenspracheEnglisch

PIN FUNCTIONS VIN1 (Bank 1):. VIN2 (Bank 2):. AUX1/AUX2 (Pins B4, B3):. OUT1/VOUT2 (Banks 4 and 5):. GND (Bank 3):. RT (Pin C1):

PIN FUNCTIONS VIN1 (Bank 1): VIN2 (Bank 2): AUX1/AUX2 (Pins B4, B3): OUT1/VOUT2 (Banks 4 and 5): GND (Bank 3): RT (Pin C1):

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PIN FUNCTIONS VIN1 (Bank 1):
Input Power for the Channel 1 Regulator. tracking function is disabled and the internal reference The VIN1 bank powers the internal control circuitry for resumes control of the error amplifier. An internal 2μA both channels and is monitored by undervoltage lock- pull-up current on this pin allows a capacitor to program out circuitry. Power must be applied to VIN1 in order for output voltage slew rate. This pin is pulled to ground dur- either channel of the LTM8024 to operate. Decouple VIN1 ing shutdown and fault conditions; use a series resistor if to ground with an external, low ESR capacitor. See Table 1 driving from a low impedance output. This pin may be left for recommended values. floating if the soft-start feature is not being used.
VIN2 (Bank 2):
Input Power for the Channel 2 Regulator.
AUX1/AUX2 (Pins B4, B3):
Low Current Voltage Source The VIN2 pin is monitored by undervoltage lockout cir- for BIAS. In many designs, the BIAS pin is simply con- cuitry. VIN1 voltage must be greater than 3.0V for VIN2 nected to VOUT by way of the AUX pin. The AUX pins are operation. Decouple VIN2 to ground with an external, low internally connected to VOUT and placed adjacent to the ESR capacitor. See Table 1 for recommended values. BIAS pin to ease printed circuit board routing. Although
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this pin is internally connected to VOUT, it is not intended
OUT1/VOUT2 (Banks 4 and 5):
Power Output for Channels 1 and 2, Respectively. Apply the output filter capacitor and to deliver a high current, so do NOT connect this pin to the output load between these pins and GND pins. the load. If this pin is not tied to BIAS, leave it floating.
GND (Bank 3):
Tie these GND pins to a local ground plane
RT (Pin C1):
Connect a resistor between RT and ground below the LTM8024 and the circuit components. In most to set the switching frequency. Do not drive this pin. applications, the bulk of the heat flow out of the LTM8024
SHARE1/SHARE2 (Pins C3, C2):
Channel 1/Channel 2 is through these pads, so the printed circuit design has a Sharing Control. Tie this to the SHAREn pin of another large impact on the thermal performance of the part. See LTM8024 channel when paralleling outputs. Otherwise, the PCB Layout and Thermal Considerations sections for leave these pins open. more details. Return the feedback divider (RFB) to this net.
RUN1/RUN2 (Pins K1, K2):
The corresponding channel of
FB1/FB2 (Pins A3, A2):
The LTM8024 regulates the FBn the LTM8024 is shutdown when this pin is low and active pin to 800mV. Connect the feedback resistor to this pin when this pin is high. Tie to VINn if shutdown feature is to set the output voltage. not used. An external resistor divider from VINn can be
BIAS (Pin A4):
The internal regulator will draw current used to program a VINn threshold below which the cor- from BIAS instead of V responding channel of the LTM8024 will shut down. Do IN1 when BIAS is tied to a voltage higher than 3.2V. For output voltages of 3.3V and above not float this pin. this pin should be tied to VOUT. If this pin is tied to a sup-
CLKOUT (Pin K4):
Synchronization Output. When ply other than VOUT use a local bypass capacitor on this SYNC > 2.8V, the CLKOUT pin provides a waveform about pin. If not used, tie this pin to GND. 90 degrees out-of-phase with Channel 1. This allows syn-
TRSS1/TRSS2 (Pin B1, B2):
Output Tracking and Soft- chronization with other regulators with up to four phases. Start Pin. This pin allows user control of output voltage When an external clock is applied to the SYNC pin, the ramp rate during startup. A TRSSn voltage below 0.8V CLKOUT pin will output a waveform with about the same forces the LTM8024 to regulate the FBn pin to equal phase, duty cycle, and frequency as the SYNC waveform. the TRSSn pin voltage. When TRSSn is above 0.8V, the In Burst Mode
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operation, the CLKOUT pin will be inter- nally grounded. Float this pin if the CLKOUT function is not used. Do not drive this pin. Rev. A For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Package PHOTOGRAPH Revision History Typical Application Related Parts