Datasheet IR3888 OptiMOS IPOL (Infineon) - 7

IR 888 OptiMOS™ IPOL 25 A single-voltage synchronous Buck regulator Pin descriptions 4 Pin descriptions
Note: I = Input, O = Output
Pin# Pin Name I/O Type Pin Description
Output voltage feedback pin. Connect this pin to the output 1 Fb I Analog of the regulator via a resistor divider to set the output voltage. Multi-function pin. Connect this pin to GND with a resistor to select Soft-Start time from 4 options. This pin also selects 2 SS/Latch I Analog latched-off Over Voltage Protection (OVP) or non-latched OVP. This pin provides the return connection for a pseudo remote voltage sensing. The feedback resistor divider should be 3 VSENM - Analog connected to this pin. It is also used as ground for the internal reference voltage. Signal ground for the internal circuitry except the internal reference voltage. AGND and PGND are not internally 4, 23 AGND - Ground connected. AGND and PGND must be connected on PCB with a single ground connection. Multi-function pin. This pin sets the switching frequency to 1 5 TON/MODE I Analog of 8 settings and sets the mode of operation to FCCM or DEM by connecting a resistor to ground. Connecting a resistor to ground sets the Over Current 6 ILIM I Analog Protection (OCP) limit. Four user selectable OCP limits are available. Power Good status output pin is open drain. Connect a pull 7 PGood O Analog up resistor from this pin to VCC or to an external bias voltage, e.g. 3.3 V. Sense pin for over voltage protection and PGood. Tie this pin 8 VSNS I Analog to Vout using a resistor divider. Alternatively, tie this pin to FB pin directly. Input voltage for an Internal LDO. A 4.7 µF capacitor should be connected between this pin and PGnd. If an external 9 VIN I Power supply is connected to VCC/LDO pin, this pin should be shorted to VCC/LDO pin and a 10 µF ceramic capacitor can be shared with Vin and VCC/LDO pin. Input bias for an external VCC voltage or output of the internal LDO. A 2.2 µF - 10 µF ceramic capacitor is 10 VCC/LDO I/O Power recommended to use between VCC, and the Power ground (PGND). Power Ground. Should be connected to the system’s power 11, 12, 13 PGND - Ground ground plane. 14, 15, 16 SW O Power Switch Node. Connect these pins to an output inductor. 17, 18, 19 PVin I Power Input supply for the power stage. Final Datasheet 7 of 49 V2.1 2019-12-11 Document Outline Revision History Trademarks Disclaimer