Datasheet PI6CB33201 (Diodes)
| Hersteller | Diodes |
| Beschreibung | Very-Low-Power Two-Output PCIe Clock Buffer With On-Chip Termination |
| Seiten / Seite | 20 / 1 — Lead-free Green. PI6CB33201. Very-Low-Power Two-Output PCIe Clock Buffer … |
| Dateiformat / Größe | PDF / 1.3 Mb |
| Dokumentensprache | Englisch |
Lead-free Green. PI6CB33201. Very-Low-Power Two-Output PCIe Clock Buffer With On-Chip Termination. Features. Description
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Diodes Incorporated
Lead-free Green PI6CB33201 Very-Low-Power Two-Output PCIe Clock Buffer With On-Chip Termination Features Description
Î Î 3.3V Supply Voltage The PI6CB33201 is a two-output very-low-power PCIe Gen1/ Î Î HCSL Input of 100MHz; Also supports 50MHz, 125MHz, or Gen2/Gen3/Gen4/Gen5 clock buffer. It takes a reference input to 133.33MHz via SMBus fanout two 100MHz low-power differential HCSL outputs with on-chip terminations. The on-chip termination can save eight Î Î Two Differential Low-Power HCSL Outputs with On-Chip Termination external resistors and make layout easier. Individual OE pin for each output provides easier power management. Î Î Default ZOUT = 100Ω Î Î Spread-Spectrum Tolerant It uses Diodes proprietary PLL design to achieve very-low jitter Î Î Individual Output Enable that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. Other than PCIe 100MHz support, this device also support Eth- Î Î Programmable Slew Rate and Output Amplitude for each output ernet application with 50MHz, 125MHz, and 133.33MHz via SMBus. It provides various options such as different slew rate Î Î Differential Outputs Blocked until PLL is Locked and amplitude through SMBUS, so users can configure the de- Î Î Strapping Pins or SMBus for Configuration vice easily to get the optimized performance for their individual Î Î Differential output-to-output skew <50ps boards. Î Î Very low jitter outputs Î Differential cycle-to-cycle jitter <50ps
Block Diagram
Î PCIe Gen1/Gen2/Gen3/Gen4/Gen5 CC compliant OE[1:0]# Î PCIe Gen 2 and 3 SRiS and SRnS compliant Î Î Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) IN+ Q1 PLL IN- Î Î Halogen and Antimony Free. “Green” Device (Note 3) Q0 Î Î For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, SCLK and manufactured in IATF 16949 certified facilities), please SDATA SADR_TRI contact us or your local Diodes representative. CTRL BW_SEL_TRI LOGIC https://www.diodes.com/quality/product-definitions/ PD# Î Î Packaging (Pb-free & Green): − 24-lead 4mm × 4mm TQFN
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CB33201 www.diodes.com January 2020 Document Number DS41833 Rev 5-2 1 Diodes Incorporated
b P
Diodes Incorporated
Lead-free Green PI6CB33201 Very-Low-Power Two-Output PCIe Clock Buffer With On-Chip Termination Features Description
Î Î 3.3V Supply Voltage The PI6CB33201 is a two-output very-low-power PCIe Gen1/ Î Î HCSL Input of 100MHz; Also supports 50MHz, 125MHz, or Gen2/Gen3/Gen4/Gen5 clock buffer. It takes a reference input to 133.33MHz via SMBus fanout two 100MHz low-power differential HCSL outputs with on-chip terminations. The on-chip termination can save eight Î Î Two Differential Low-Power HCSL Outputs with On-Chip Termination external resistors and make layout easier. Individual OE pin for each output provides easier power management. Î Î Default ZOUT = 100Ω Î Î Spread-Spectrum Tolerant It uses Diodes proprietary PLL design to achieve very-low jitter Î Î Individual Output Enable that meets PCIe Gen1/Gen2/Gen3/Gen4/Gen5 requirements. Other than PCIe 100MHz support, this device also support Eth- Î Î Programmable Slew Rate and Output Amplitude for each output ernet application with 50MHz, 125MHz, and 133.33MHz via SMBus. It provides various options such as different slew rate Î Î Differential Outputs Blocked until PLL is Locked and amplitude through SMBUS, so users can configure the de- Î Î Strapping Pins or SMBus for Configuration vice easily to get the optimized performance for their individual Î Î Differential output-to-output skew <50ps boards. Î Î Very low jitter outputs Î Differential cycle-to-cycle jitter <50ps
Block Diagram
Î PCIe Gen1/Gen2/Gen3/Gen4/Gen5 CC compliant OE[1:0]# Î PCIe Gen 2 and 3 SRiS and SRnS compliant Î Î Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) IN+ Q1 PLL IN- Î Î Halogen and Antimony Free. “Green” Device (Note 3) Q0 Î Î For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, SCLK and manufactured in IATF 16949 certified facilities), please SDATA SADR_TRI contact us or your local Diodes representative. CTRL BW_SEL_TRI LOGIC https://www.diodes.com/quality/product-definitions/ PD# Î Î Packaging (Pb-free & Green): − 24-lead 4mm × 4mm TQFN
Notes:
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. PI6CB33201 www.diodes.com January 2020 Document Number DS41833 Rev 5-2 1 Diodes Incorporated