Datasheet PI6CG33802C (Diodes) - 2
| Hersteller | Diodes |
| Beschreibung | 3.3V Very Low Power 8-Output PCIe Clock Generator With On-Chip Termination |
| Seiten / Seite | 24 / 2 — PI6CG33802C. Pin Configuration. GND. Pin Description. Pin #. Pin Name. … |
| Dateiformat / Größe | PDF / 1.8 Mb |
| Dokumentensprache | Englisch |
PI6CG33802C. Pin Configuration. GND. Pin Description. Pin #. Pin Name. Type. Description
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A product Line of Diodes Incorporated
PI6CG33802C Pin Configuration
O O PD# V DD OE7# Q7- Q7+ OE6# Q6- Q6+ GND V DD V DD OE5# 48 47 46 45 44 43 42 41 40 39 38 37 SS_SEL_TRI 1 36 Q5- GND_XTAL 2 35 Q5+ XTAL_IN/CLK 3 34 OE4# XTAL_OUT 4 33 Q4- V 5 DD_OSC 32 Q4+ V 6 DD_REFOUT 31 VDDO
GND
SADR/REFOUT 7 30 VDDA GND_REFOUT 8 29 GNDA GND_DIG 9 28 OE3# SCLK 10 27 Q3- SDATA 11 26 Q3+ V 12 DD_DIG 25 OE2# 13 14 15 16 17 18 19 20 21 22 23 24 O O Q0+ Q0- Q1+ Q1- V DD OE0# VDD OE1# Q2+ V DD GND Q2-
Pin Description Pin # Pin Name Type Description
Latched select input to select spread spectrum amount at initial power up. 1 SS_SEL_TRI Input Tri-level 1 = -0.5% spread, M = Spread Off, 0 = Spread Off. This pin has both in- ternal pull-up and pull-down. Refer to SMBUS byte_1 bit 4, 3 = '01' to get -0.25% spread. 2 GND_XTAL Power — Ground for oscillator circuit 3 XTAL_IN/CLK Input — Crystal input or CMOS reference input 4 XTAL_OUT Output — Crystal output 5 VDD_OSC Power — Power supply for oscillator circuitry, nominal 3.3V 6 VDD_REFOUT Power — Power supply for buffered CMOS output 7 SADR/REFOUT Input/ Output CMOS Latch to select SMBus Address or LVCMOS REFOUT. This pin has an internal pull-down 8 GND_REFOUT Power — Ground for REFOUT 9 GND_DIG Power — Ground for digital circuitry 10 SCLK Input CMOS SMBUS clock input, 3.3V tolerant 11 SDATA Input/ Output CMOS SMBUS data line, 3.3V tolerant 12 VDD_DIG Power — Power supply for digital circuitry, nominal 3.3V 13, 21, 31, 39, 47 VDDO Power — Power supply for differential outputs Active-low input for enabling Q0 pair. This pin has an internal pulldown. 14 OE0# Input CMOS 1 =disable outputs, 0 = enable outputs 15 Q0+ Output HCSL Differential true clock output PI6CG33802C www.diodes.com January 2020 Document Number DS42298 Rev 3-2 2 Diodes Incorporated
PI6CG33802C Pin Configuration
O O PD# V DD OE7# Q7- Q7+ OE6# Q6- Q6+ GND V DD V DD OE5# 48 47 46 45 44 43 42 41 40 39 38 37 SS_SEL_TRI 1 36 Q5- GND_XTAL 2 35 Q5+ XTAL_IN/CLK 3 34 OE4# XTAL_OUT 4 33 Q4- V 5 DD_OSC 32 Q4+ V 6 DD_REFOUT 31 VDDO
GND
SADR/REFOUT 7 30 VDDA GND_REFOUT 8 29 GNDA GND_DIG 9 28 OE3# SCLK 10 27 Q3- SDATA 11 26 Q3+ V 12 DD_DIG 25 OE2# 13 14 15 16 17 18 19 20 21 22 23 24 O O Q0+ Q0- Q1+ Q1- V DD OE0# VDD OE1# Q2+ V DD GND Q2-
Pin Description Pin # Pin Name Type Description
Latched select input to select spread spectrum amount at initial power up. 1 SS_SEL_TRI Input Tri-level 1 = -0.5% spread, M = Spread Off, 0 = Spread Off. This pin has both in- ternal pull-up and pull-down. Refer to SMBUS byte_1 bit 4, 3 = '01' to get -0.25% spread. 2 GND_XTAL Power — Ground for oscillator circuit 3 XTAL_IN/CLK Input — Crystal input or CMOS reference input 4 XTAL_OUT Output — Crystal output 5 VDD_OSC Power — Power supply for oscillator circuitry, nominal 3.3V 6 VDD_REFOUT Power — Power supply for buffered CMOS output 7 SADR/REFOUT Input/ Output CMOS Latch to select SMBus Address or LVCMOS REFOUT. This pin has an internal pull-down 8 GND_REFOUT Power — Ground for REFOUT 9 GND_DIG Power — Ground for digital circuitry 10 SCLK Input CMOS SMBUS clock input, 3.3V tolerant 11 SDATA Input/ Output CMOS SMBUS data line, 3.3V tolerant 12 VDD_DIG Power — Power supply for digital circuitry, nominal 3.3V 13, 21, 31, 39, 47 VDDO Power — Power supply for differential outputs Active-low input for enabling Q0 pair. This pin has an internal pulldown. 14 OE0# Input CMOS 1 =disable outputs, 0 = enable outputs 15 Q0+ Output HCSL Differential true clock output PI6CG33802C www.diodes.com January 2020 Document Number DS42298 Rev 3-2 2 Diodes Incorporated