Datasheet PI6CG33202C (Diodes) - 3

A product Line of Diodes Incorporated
PI6CG33202C Pin Description Cont. Pin # Pin Name Type Description
17 Q1+ Output HCSL Differential true clock output 18 Q1- Output HCSL Differential complementary clock output Active low input for enabling Q1 pair. This pin has an internal pull- 19 OE1# Input CMOS down. 1 =disable outputs, 0 = enable outputs Input notifies device to sample latched inputs and start up on first high 22 PD# Input CMOS assertion. Low enters Power Down Mode, subsequent high assertions exit Power Down Mode. This pin has internal pull-up resistor. Latched select input to select spread spectrum amount at initial power 23 SS_SEL_TRI Input Tri-level up. 1 = 0.5% spread, M = Spread off, 0 = Spread off. The pin has both internal pull-up and pull-down. Refer to SMBUS byte_1 bit 4, 3 = '01' to get -0.25% spread. Epad GND Power Connect to Ground PI6CG33202C www.diodes.com January 2020 Document Number DS42292 Rev 3-2 3 Diodes Incorporated