Datasheet AD73322L (Analog Devices) - 9

AD73322L ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise noted.
Table 5.
Stresses above those listed under Absolute Maximum Ratings
Parameters Ratings
may cause permanent damage to the device. This is a stress AVDD, DVDD to GND −0.3 V to +4.6 V rating only; functional operation of the device at these or any AGND to DGND −0.3 V to +0.3 V other conditions above those listed in the operational sections Digital I/O Voltage to DGND −0.3 V to (DVDD + 0.3 V) of this specification is not implied. Exposure to absolute Analog I/O Voltage to AGND −0.3 V to (AVDD + 0.3 V) maximum rating conditions for extended periods may affect Operating Temperature Range device reliability. Industrial (A Version) −40°C to +85°C Extended (Y Version) −40°C to +105°C Storage Temperature Range −65°C to +150°C Maximum Junction Temperature 150°C SOIC, θJA Thermal Impedance 71.4°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C LQFP, θJA Thermal Impedance 53.2°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C TSSOP, θJA Thermal Impedance 97.9°C/W Lead Temperature, Soldering Vapor Phase (60 sec) 215°C Infrared (15 sec) 220°C
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the uman body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 9 of 48 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS CURRENT SUMMARY SIGNAL RANGES TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY ABBREVIATIONS TYPICAL PERFORMANCE CHARACTERISTICS AND FUNCTIONAL BLOCK DIA FUNCTIONAL DESCRIPTIONS ENCODER CHANNELS PROGRAMMABLE GAIN AMPLIFIER ADC ANALOG SIGMA-DELTA MODULATOR DECIMATION FILTER ADC CODING DECODER CHANNEL DAC CODING INTERPOLATION FILTER ANALOG SMOOTHING FILTER AND PGA DIFFERENTIAL OUTPUT AMPLIFIERS VOLTAGE REFERENCE ANALOG AND DIGITAL GAIN TAPS DIGITAL GAIN TAP SERIAL PORT (SPORT) SPORT OVERVIEW SPORT REGISTER MAPS MASTER CLOCK DIVIDER SERIAL CLOCK RATE DIVIDER SAMPLE RATE DIVIDER DAC ADVANCE REGISTER CONTROL REGISTER A CONTROL REGISTER B CONTROL REGISTER C CONTROL REGISTER D CONTROL REGISTER E CONTROL REGISTER F CONTROL REGISTER G CONTROL REGISTER H OPERATION RESETTING THE AD73322L POWER MANAGEMENT OPERATING MODES PROGRAM (CONTROL) MODE DATA MODE MIXED PROGRAM/DATA MODE DIGITAL LOOP-BACK MODE SPORT LOOP-BACK MODE ANALOG LOOP-BACK MODE INTERFACING CASCADE OPERATION PERFORMANCE ENCODER SECTION ENCODER GROUP DELAY DECODER SECTION ON-CHIP FILTERING DECODER GROUP DELAY DESIGN CONSIDERATIONS ANALOG INPUTS INTERFACING TO AN ELECTRET MICROPHONE ANALOG OUTPUT DIFFERENTIAL-TO-SINGLE-ENDED OUTPUT DIGITAL INTERFACING CASCADE OPERATION GROUNDING AND LAYOUT DSP PROGRAMMING CONSIDERATIONS DSP SPORT CONFIGURATION DSP SPORT INTERRUPTS DSP SOFTWARE CONSIDERATIONS WHEN INTERFACING TO THE AD73322L OPERATING MODE MIXED-MODE OPERATION INTERRUPTS INITIALIZATION RUNNING THE AD73322L WITH ADCS OR DACS IN POWER-DOWN DAC TIMING CONTROL EXAMPLE CONFIGURING AN AD73322L TO OPERATE IN DATA MODE CONFIGURING AN AD73322L TO OPERATE IN MIXED MODE OUTLINE DIMENSIONS ORDERING GUIDE