link to page 10 link to page 13 AD8209AData SheetTHEORY OF OPERATION The AD8209A is a single-supply difference amplifier typically used A low-pass filter can be easily implemented by connecting A1 to to amplify a small differential voltage in the presence of rapidly A2 and placing a capacitor to ground (see Figure 32). changing, high common-mode voltages. The value of RF1 and RF2 is 10 kΩ, providing a gain of 2 V/V for The AD8209A consists of two amplifiers (A1 and A2), a resistor Amplifier A2. When connecting Pin A1 and Pin A2 together, the network, a smal voltage reference, and a bias circuit (not shown); AD8209A provides a total system gain equal to see Figure 23. Total Gain of (A1 + A2) (V/V) = 7 (V/V) × 2 (V/V) = 14 V/V The set of input attenuators preceding A1 consist of RA, RB, and at the output of A2 (the OUT pin). RC, which feature a combined series resistance of approximately 400 kΩ ± 20%. The purpose of these resistors is to attenuate the The ratios of RA, RB, RC, and RF are trimmed to a high level of input voltage to match the input voltage range of A1. This balanced precision, al owing a typical CMRR value that exceeds 80 dB. This resistor network attenuates the common-mode signal by a ratio performance is accomplished by laser trimming the resistor ratio of 1/14. The A1 amplifier inputs are held within the power supply matching to better than 0.01%. range, even as Pin 1 and Pin 8 exceed the supply or fal below the –INV+INSA1A2 common (ground). A reference voltage of 350 mV biases the attenuator above ground, allowing Amplifier A1 to operate in RARARFILTER++ the presence of negative common-mode voltages. A1A2OUT–– The input resistor network also attenuates normal (differential) RRRF1BB mode voltages. Therefore, A1 features a gain of 97 V/V to provide RGRM a total system gain, from ±IN to the output of A1, equal to 7 V/V, RRRFRFCRCF2 as shown in the following equation: Gain (A1) = 1/14 (V/V) × 97 (V/V) = 7 V/V 350mV A precision trimmed, 100 kΩ resistor is placed in series with the 025 1- 1 output of Amplifier A1. The user has access to this resistor via GND 145 an external pin (A1). Figure 23. Simplified Schematic Rev. A | Page 10 of 15 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION HIGH-SIDE CURRENT SENSINGWITH A LOW-SIDE SWITCH HIGH RAIL CURRENT SENSING LOW-SIDE CURRENT SENSING 4 mA to 20 mA Current Loop Receiver GAIN ADJUSTMENT Gains Less than 14 Gains Greater than 14 GAIN TRIM Internal Signal Overload Considerations LOW-PASS FILTERING HIGH LINE CURRENT SENSING WITH LOW-PASS FILTERING AND GAIN ADJUSTMENT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS