PIC16(L)F170X/171X (Microchip) - 10

HerstellerMicrochip
BeschreibungCost Effective 8-Bit Intelligent Analog Flash Microcontrollers
Seiten / Seite18 / 10 — PIC16(L)F170X/171X. TABLE 3:. 20-PIN ALLOCATION TABLE (PIC16(L)F1707). …
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PIC16(L)F170X/171X. TABLE 3:. 20-PIN ALLOCATION TABLE (PIC16(L)F1707). OIC/. ros. SSP. rru. ll-. sic. I/O. SSO. ADC. fere. ime. CCP. ro C. (1). (3). d va

PIC16(L)F170X/171X TABLE 3: 20-PIN ALLOCATION TABLE (PIC16(L)F1707) OIC/ ros SSP rru ll- sic I/O SSO ADC fere ime CCP ro C (1) (3) d va

Modelllinie für dieses Datenblatt

PIC16F1703
PIC16F1704
PIC16F1705
PIC16F1707
PIC16F1708
PIC16F1709
PIC16F1713
PIC16F1716
PIC16F1717
PIC16F1718
PIC16F1719

Textversion des Dokuments

DS4
PIC16(L)F170X/171X TABLE 3: 20-PIN ALLOCATION TABLE (PIC16(L)F1707)
0001708A-p
s ce p t ) OIC/ P n rs p p (2 N ros u /S Am SSP rru ll- sic I/O IP SSO QF ADC fere ime CCP M te u Ba D Op ro C T In P P Re Ze
age 10 RA0 19 16 AN0 VREF- — — — — — IOC Y ICSPDAT RA1 18 15 AN1 VREF+ — — — — — IOC Y ICSPCLK RA2 17 14 AN2 — — ZCD T0CKI
(1)
— — INT
(1)
Y — IOC RA3 4 1 — — — — — — — IOC Y MCLR VPP RA4 3 20 AN3 — — — T1G
(1)
— — IOC Y CLKOUT RA5 2 19 — — — — T1CKI — — IOC Y CLKIN RB4 13 10 AN10 — OPA1IN- — — — SCK
(1)
IOC Y — SDA
(3) A
RB5 12 9 AN11 — OPA1IN+ — — — — IOC Y —
d va
RB6 11 8 — — — — — — SDI
(1)
IOC Y — SCL
(3) nce Inf
RB7 10 7 — — — — — — — IOC Y — RC0 16 13 AN4 — — — — — — IOC Y — RC1 15 12 AN5 — — — — — — IOC Y —
o r
RC2 14 11 AN6 — OPA1OUT — — — — IOC Y —
m
RC3 7 4 AN7 — OPA2OUT — — CCP2
(1)
— IOC Y —
at ion
RC4 6 3 — — OPA2IN- — — — — IOC Y — RC5 5 2 — — OPA2IN+ — — CCP1
(1)
— IOC Y — RC6 8 5 AN8 — — — — — SS
(1)
IOC Y — RC7 9 6 AN9 — — — — — — IOC Y — VDD 1 18 — — — — — — — — — VDD VSS 20 17 — — — — — — — — — VSS  — — — — — — — CPP1 SDA
(3)
— — — 20 — — — — — — — CPP2 SCL
(3)
— — — 13 M OUT
(2)
SCK — — — — — — — — SDO — — — icrochip
Note 1:
Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
2:
All pin digital outputs default to PORT latch data. Any pin can be selected as a peripheral digital output with the PPS output selection registers.
3:
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. T e chnology Inc. Document Outline Description: Core Features: Memory: Operating Characteristics: eXtreme Low-Power (XLP) Features: - 8 uA @ 32 kHz, 1.8V, typical - 32 uA/MHz @ 1.8V, typical Digital Peripherals: Intelligent Analog Peripherals: Clocking Structure: Programming/Debug Features: TABLE 1: 14-Pin and 16-Pin Allocation Table (PIC16(L)F1703) TABLE 2: 14-Pin and 16-Pin Allocation Table (PIC16(L)F1704/5) TABLE 3: 20-Pin Allocation Table (PIC16(L)F1707) TABLE 4: 20-Pin Allocation Table (PIC16(L)F1708/9) TABLE 5: 28-Pin Allocation Table (PIC16L(F)1713/6/8) (Part 1) TABLE 6: 28-Pin Allocation Table (PIC16L(F)1713/6/8) (Part 2) TABLE 7: Pin Allocation Table (PIC16L(F)1717/9) (Part 1) TABLE 8: Pin Allocation Table (PIC16L(F)1717/9) (Part 2 Trademarks Worldwide Sales